TJA1054A
Fault-tolerant CAN transceiver
Rev. 5 — 3 August 2010
Product data sheet
1. General description
The TJA1054A is the interface between the protocol controller and the physical bus wires
in a Controller Area Network (CAN). It is primarily intended for low-speed applications up
to 125 kBd in passenger cars. The device provides differential receive and transmit
capability but will switch to single-wire transmitter and/or receiver in error conditions.
The TJA1054A is the ElectroStatic Discharge (ESD) improved version of the TJA1054.
The TJA1054AT is, as the TJA1054T, pin and downwards compatible with the
PCA82C252T and the TJA1053T. This means that these two devices can be replaced by
the TJA1054AT or the TJA1054T with retention of all functions.
The most important improvements of the TJA1054 and the TJA1054A with respect to the
PCA82C252 and the TJA1053 are:
•
Very low ElectroMagnetic Emission (EME) due to a very good matching of the CANL
and CANH output signals
•
•
•
•
•
Good ElectroMagnetic Emission (EMI), especially in low power modes
Full wake-up capability during bus failures
Extended bus failure management including short-circuit of the CANH bus line to V
CC
Support for easy system fault diagnosis
Two-edge sensitive wake-up input signal via pin WAKE
2. Features and benefits
2.1 Optimized for in-car low-speed communication
Baud rate up to 125 kBd
Up to 32 nodes can be connected
Supports unshielded bus wires
Very low ElectroMagnetic Emission (EME) due to built-in slope control function and a
very good matching of the CANL and CANH bus outputs
Good ElectroMagnetic Immunity (EMI) in normal operating mode and in low power
modes
Fully integrated receiver filters
Transmit Data (TxD) dominant time-out function
2.2 Bus failure management
Supports single-wire transmission modes with ground offset voltages up to 1.5 V
NXP Semiconductors
TJA1054A
Fault-tolerant CAN transceiver
Automatic switching to single-wire mode in the event of bus failures, even when the
CANH bus wire is short-circuited to V
CC
Automatic reset to differential mode if bus failure is removed
Full wake-up capability during failure modes
2.3 Protections
Bus pins short-circuit safe to battery and to ground
Thermally protected
Bus lines protected against transients in an automotive environment
An unpowered node does not disturb the bus lines
2.4 Support for low power modes
Low-current sleep mode and standby mode with wake-up via the bus lines
Power-on reset flag on the output
3. Quick reference data
Table 1.
Quick reference data
V
CC
= 4.75 V to 5.25 V; V
BAT
= 5.0 V to 27 V; V
STB
= V
CC
; T
vj
=
−
40
°
C to +150
°
C; all voltages are
defined with respect to ground; positive currents flow into the device; unless otherwise
specified.
[1][2][3]
Symbol Parameter
V
CC
V
BAT
supply voltage
battery supply voltage
on pin BAT
no time limit
operating mode
load dump
I
BAT
V
CANH
battery supply current
on pin BAT
voltage on pin CANH
sleep mode; V
CC
= 0 V;
V
BAT
= 12 V
V
CC
= 0 V to 5.0 V;
V
BAT
≥
0 V; no time limit;
with respect to
any other pin
V
CC
= 0 V to 5.0 V;
V
BAT
≥
0 V; no time limit;
with respect to
any other pin
I
CANH
=
−40
mA
I
CANL
= 40 mA
between 10 % and 90 %;
C1 = 10 nF; see
Figure 5
between 10 % and 90 %;
C1 = 1 nF; see
Figure 5
[4]
Conditions
Min
4.75
−0.3
5.0
-
-
−27
Typ
-
-
-
-
30
-
Max
5.25
+40
27
40
50
+40
Unit
V
V
V
V
μA
V
V
CANL
voltage on pin CANL
−27
-
+40
V
ΔV
CANH
ΔV
CANL
t
r
t
f
T
vj
[1]
voltage drop on pin CANH
voltage drop on pin CANL
bus line output rise time
bus line output fall time
virtual junction temperature
-
-
-
-
−40
-
-
0.6
0.3
-
1.4
1.4
-
-
+150
V
V
μs
μs
°C
All parameters are guaranteed over the virtual junction temperature range by design, but only 100 % tested
at T
amb
= 125
°C
for dies on wafer level, and above this for cased products 100 % tested at T
amb
= 25
°C,
unless otherwise specified.
For bare die, all parameters are only guaranteed if the back side of the die is connected to ground.
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
[2]
TJA1054A
Product data sheet
Rev. 5 — 3 August 2010
2 of 27
NXP Semiconductors
TJA1054A
Fault-tolerant CAN transceiver
[3]
[4]
A local or remote wake-up event will be signalled at the transceiver pins RXD and ERR if
V
BAT
= 5.3 V to 27 V (see
Table 5).
Junction temperature in accordance with
“IEC 60747-1”.
An alternative definition is: T
vj
= T
amb
+ P
×
R
th(vj-a)
where R
th(vj-a)
is a fixed value to be used for the calculation of T
vj
. The rating for T
vj
limits the allowable
combinations of power dissipation (P) and ambient temperature (T
amb
).
4. Ordering information
Table 2.
Ordering information
Package
Name
TJA1054AT
TJA1054AT/S900
TJA1054AU
SO14
SO14
-
Description
plastic small outline package; 14 leads; body width 3.9 mm
plastic small outline package; 14 leads; body width 3.9 mm
bare die; 1990
μm ×
2730
μm ×
375
μm
Version
SOT108-1
SOT108-1
-
Type number
5. Block diagram
BAT
14
V
CC
10
INH
WAKE
STB
EN
1
7
5
6
V
CC
2
DRIVER
TIMER
WAKE-UP
STANDBY
CONTROL
TEMPERATURE
PROTECTION
9
11
12
8
RTL
CANH
CANL
RTH
TXD
V
CC
4
FAILURE DETECTOR
PLUS WAKE-UP
PLUS TIME-OUT
TJA1054A
ERR
V
CC
3
RECEIVER
FILTER
RXD
FILTER
13
GND
mgu383
Fig 1. Block diagram
TJA1054A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 3 August 2010
3 of 27
NXP Semiconductors
TJA1054A
Fault-tolerant CAN transceiver
6. Pinning information
6.1 Pinning
INH
TXD
RXD
ERR
STB
EN
WAKE
1
2
3
4
5
6
7
001aaf609
14 BAT
13 GND
12 CANL
TJA1054AT
11 CANH
10 V
CC
9
8
RTL
RTH
Fig 2. Pin configuration
6.2 Pin description
Table 3.
Symbol
INH
TXD
RXD
ERR
Pin description
Pin
1
2
3
4
Description
inhibit output for switching an external voltage regulator if a
wake-up signal occurs
transmit data input for activating the driver to the bus lines
receive data output for reading out the data from the bus lines
error, wake-up and power-on indication output; active LOW in
normal operating mode when a bus failure is detected; active LOW
in standby and sleep mode when a wake-up is detected; active
LOW in power-on standby when a V
BAT
power-on event is
detected
standby digital control signal input; together with the input signal
on pin EN this input determines the state of the transceiver;
see
Table 5
and
Figure 3
enable digital control signal input; together with the input signal on
pin STB this input determines the state of the transceiver;
see
Table 5
and
Figure 3
local wake-up signal input (active LOW); both falling and rising
edges are detected
termination resistor connection; in case of a CANH bus wire error
the line is terminated with a predefined impedance
termination resistor connection; in case of a CANL bus wire error
the line is terminated with a predefined impedance
supply voltage
HIGH-level CAN bus line
LOW-level CAN bus line
ground
battery supply voltage
© NXP B.V. 2010. All rights reserved.
STB
5
EN
6
WAKE
RTH
RTL
V
CC
CANH
CANL
GND
BAT
TJA1054A
7
8
9
10
11
12
13
14
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 5 — 3 August 2010
4 of 27
NXP Semiconductors
TJA1054A
Fault-tolerant CAN transceiver
7. Functional description
The TJA1054A is the interface between the CAN protocol controller and the physical
wires of the CAN bus (see
Figure 7).
It is primarily intended for low-speed applications, up
to 125 kBd, in passenger cars. The device provides differential transmit capability to the
CAN bus and differential receive capability to the CAN controller.
To reduce EME, the rise and fall slopes are limited. This allows the use of an unshielded
twisted pair or a parallel pair of wires for the bus lines. Moreover, the device supports
transmission capability on either bus line if one of the wires is corrupted. The failure
detection logic automatically selects a suitable transmission mode.
In normal operating mode (no wiring failures) the differential receiver is output on pin RXD
(see
Figure 1).
The differential receiver inputs are connected to pins CANH and CANL
through integrated filters. The filtered input signals are also used for the single-wire
receivers. The receivers connected to pins CANH and CANL have threshold voltages that
ensure a maximum noise margin in single-wire mode.
A timer function (TxD dominant time-out function) has been integrated to prevent the bus
lines from being driven into a permanent dominant state (thus blocking the entire network
communication) due to a situation in which pin TXD is permanently forced to a LOW level,
caused by a hardware and/or software application failure.
If the duration of the LOW level on pin TXD exceeds a certain time, the transmitter will be
disabled. The timer will be reset by a HIGH level on pin TXD.
7.1 Failure detector
The failure detector is fully active in the normal operating mode. After the detection of a
single bus failure the detector switches to the appropriate mode (see
Table 4).
The
differential receiver threshold voltage is set at
−3.2
V typical (V
CC
= 5 V). This ensures
correct reception with a noise margin as high as possible in the normal operating mode
and in the event of failures 1, 2, 5 and 6a. These failures, or recovery from them, do not
destroy ongoing transmissions. The output drivers remain active, the termination does not
change and the receiver remains in differential mode (see
Table 4).
Failures 3, 3a and 6 are detected by comparators connected to the CANH and CANL bus
lines. Failures 3 and 3a are detected in a two-step approach. If the CANH bus line
exceeds a certain voltage level, the differential comparator signals a continuous dominant
condition. Because of inter operability reasons with the predecessor products
PCA82C252 and TJA1053, after a first time-out the transceiver switches to single-wire
operation through CANH. If the CANH bus line is still exceeding the CANH detection
voltage for a second time-out, the TJA1054A switches to CANL operation; the CANH
driver is switched off and the RTH bias changes to the pull-down current source. The
time-outs (delays) are needed to avoid false triggering by external RF fields.
TJA1054A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 3 August 2010
5 of 27
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