EEWORLDEEWORLDEEWORLD

Part Number

Search

P4C174-20JMB

Description
HIGH SPEED 8K x 8 CACHE TAG STATIC RAM
File Size279KB,12 Pages
ManufacturerPyramid Semiconductor Corporation
Websitehttp://www.pyramidsemiconductor.com/
Download Datasheet View All

P4C174-20JMB Overview

HIGH SPEED 8K x 8 CACHE TAG STATIC RAM

P4C174
HIGH SPEED 8K x 8
CACHE TAG STATIC RAM
FEATURES
High Speed Address-To-Match - 8 ns Maximum
Access Time
High-Speed Read-Access Time
– 8/10/12/15/20/25 ns (Commercial)
– 15/20/25 ns (Military)
Open Drain MATCH Output
Reset Function
8-Bit Tag Comparison Logic
Automatic Powerdown During Long Cycles
Data Retention at 2V for Battery Backup
Operation
Advanced CMOS Technology
Low Power Operation
Package Styles Available
— 28 Pin 300 mil DIP
— 28 Pin 300 mil Plastic SOJ
Single Power Supply
— 5V±10%
DESCRIPTION
The P4C174 is a 65,536 bit high speed cache tag static
RAM organized as 8K x 8. The CMOS memory has equal
access and cycle times. Inputs are fully TTL-compatible.
The cache tag RAMs operate from a single 5V±10%
power supply. An 8-bit data comparator with a MATCH
output is included for use as an address tag comparator
in high speed cache applications. The reset function
provides the capability to reset all memory locations to a
LOW level.
The MATCH output of the P4C174 reflects the compari-
son result between the 8-bit data on the I/O pins and
the addressed memory location. 8K Cache lines can be
mapped into 1M-Byte address spaces by comparing 20
address bits organized as 13-line address bits and 7-
page address bits.
Low power operation of the P4C174 is enhanced by
automatic powerdown when the memory is deselected or
during long cycle times. Also, data retention is main-
tained down to V
CC
= 2.0. Typical battery backup appli-
cations consume only 30
µ
W at V
CC
=
3.0V.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
DIP (C5, P5), SOJ (J5)
Document #
SRAM118
REV C
1
Revised August 2006
test...
...
4543464 Embedded System
Spectrum refinement analysis method based on Labview
Spectrum refinement analysis method based on Labview...
安_然 Test/Measurement
How is the LSI used in stm8l101awu calibrated?
How is the stm8l101 LSI calibrated? I saw in the pdf that it only says to connect to tim2???...
laofuzi stm32/stm8
CCS5.2 uses hex2000.exe
[color=#000]I would like to ask how to use hex2000.exe in the CCS5.2 development environment. That is, after the code is compiled, hex2000.exe is automatically used to convert the .out file into a .he...
yHj Microcontroller MCU
Ask a Question
Help:Hey guys, does anyone know how to connect the LM3s 8962 network part to the HR911105A interface? Can you provide the schematic diagram? Thank you. I'm just getting started, please help me. Thank ...
冒睡醒 Microcontroller MCU
VERILOG+HDL hardware description language
VERILOG+HDL hardware description language...
zcx2012 FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 521  188  1815  491  193  11  4  37  10  23 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号