P4C149-35LSMB datasheet, PDF - EEWORLD Datasheet

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P4C149-35LSMB: DescriptionULTRA HIGH SPEED 1K x 4 STATIC CMOS RAMS; File Size277KB，10 Pages; ManufacturerPyramid Semiconductor Corporation; Websitehttp://www.pyramidsemiconductor.com/

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P4C149-35LSMB Overview

ULTRA HIGH SPEED 1K x 4 STATIC CMOS RAMS

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P4C148, P4C149

ULTRA HIGH SPEED 1K x 4

STATIC CMOS RAMS

FEATURES

Full CMOS, 6T Cell

High Speed (Equal Access and Cycle Times)

– 10/12/15/20/25/35/45/55 ns (Commercial)

– 15/20/25/35/45/55 ns (P4C148 Military)

Low Power Operation

Single 5V ± 10% Power Supply

Two Options

– P4C148 Low Power Standby Mode

– P4C149 Fast Chip Select Control

Common Input/Output Ports

Three-State Outputs

Fully TTL Compatible Inputs and Outputs

Standard Pinout (JEDEC Approved)

– 18 Pin 300 mil DIP

– 18 Pin LCC (295 x 335 mil) [P4C148 only]

– 18 Pin LCC (290 x 430 mil)

DESCRIPTION

The P4C148 and P4C149 are 4,096-bit ultra high-speed

static RAMs organized as 1K x 4. Both devices have

common input/output ports. The P4C148 enters the

standby mode when the chip enable (CE) goes HIGH;

with CMOS input levels, power consumption is extremely

low in this mode. The P4C149 features a fast chip select

capability using

CS.

The CMOS memories require no

clocks or refreshing, and have equal access and cycle

times. Inputs are fully TTL-compatible. The RAMs

operate from a single 5V

10% tolerance power supply.

Access times as fast as 10 nanoseconds are available,

permitting greatly enhanced system operating speeds.

CMOS is used to reduce power consumption when

active; for the P4C148, consumption is further reduced in

the standby mode.

The P4C148 and P4C149 are available in 18-pin 300 mil

DIP packages, as well as 2 different LCC packages,

providing excellent board level densities.

FUNCTIONAL BLOCK DIAGRAM

PIN CONFIGURATION

P4C148 DIP (C9, D1, P1)

P4C149 DIP (P1)

P4C148 LCC (L7, L7-1)

P4C149 LCC (L7)

Document #

SRAM104

REV B

Revised April 2007

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