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24C02A-IP

Description
1K/2K/4K 5.0V I 2 C O Serial EEPROMs
File Size75KB,12 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Download Datasheet View All

24C02A-IP Overview

1K/2K/4K 5.0V I 2 C O Serial EEPROMs

24C01A/02A/04A
1K/2K/4K 5.0V I
2
C
Serial EEPROMs
FEATURES
Low power CMOS technology
Hardware write protect
Two wire serial interface bus, I
2
C
compatible
5.0V only operation
Self-timed write cycle (including auto-erase)
Page-write buffer
1ms write cycle time for single byte
1,000,000 Erase/Write cycles guaranteed
Data retention >200 years
8-pin DIP/SOIC packages
Available for extended temperature ranges
- Commercial (C):
0˚C to +70˚C
- Industrial (I):
-40˚C to +85˚C
- Automotive (E):
-40˚C to +125˚C
PACKAGE TYPES
DIP
A0
A1
A2
V
SS
8-lead
SOIC
1
2
3
4
24C01A
24C02A
24C04A
8
7
6
5
V
CC
WP*
SCL
SDA
A0
A1
A2
V
SS
1
2
3
4
24C01A
24C02A
24C04A
8
7
6
5
V
CC
WP*
SCL
SDA
DESCRIPTION
The Microchip Technology Inc. 24C01A/02A/04A is a
1K/2K/4K bit Electrically Erasable PROM. The device
is organized as shown, with a standard two wire serial
interface. Advanced CMOS technology allows a signif-
icant reduction in power over NMOS serial devices. A
special feature in the 24C02A and 24C04A provides
hardware write protection for the upper half of the block.
The 24C01A and 24C02A have a page write capability
of two bytes and the 24C04A has a page length of eight
bytes. Up to eight 24C01A or 24C02A devices and up
to four 24C04A devices may be connected to the same
two wire bus.
This device offers fast (1ms) byte write and
extended (-40
°
C to 125
°
C) temperature operation. It
is recommended that all other applications use
Microchip’s 24LCXXB.
24C01A
Organization
Write Protect
Page Write
Buffer
128 x 8
None
2 Bytes
24C02A
258 x 8
080-0FF
2 Bytes
24C04A
2 x 256 x 8
100-1FF
8 Bytes
14-lead
SOIC
NC
A0
A1
NC
A2
V
SS
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
NC
V
CC
WP
NC
SCL
SDA
NC
24C01A
24C02A
24C04A
* “TEST” pin in 24C01A
BLOCK DIAGRAM
Vcc
Vss
Data
Buffer
(FIFO)
Data Reg.
SDA
A
d
d
r
e
s
s
Vpp
R/W Amp
Slave Addr.
P
o
i
n A0 to
t
e A7
r
Increment
Memory
Array
SCL
Control
Logic
A8
A0 A1 A2 WP
I
2
C is a trademark of Philips Corporation.
©
1996 Microchip Technology Inc.
DS11183D-page 1
This document was created with FrameMaker 4 0 4
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