HIGH-SPEED
4K x 8 DUAL-PORT
STATIC RAM WITH SEMAPHORE
Integrated Device Technology, Inc.
IDT71342SA/LA
FEATURES:
• High-speed access
— Commercial: 20/25/35/45/55/70ns (max.)
• Low-power operation
— IDT71342SA
Active: 500mW (typ.)
Standby: 5mW (typ.)
— IDT71342LA
Active: 500mW (typ.)
Standby: 1mW (typ.)
• Fully asynchronous operation from either port
• Full on-chip hardware support of semaphore signalling
between ports
• Battery backup operation—2V data retention
• TTL-compatible; single 5V (±10%) power supply
• Available in plastic packages
• Industrial temperature range (–40°C to +85°C) is avail-
able, tested to military electrical specifications
DESCRIPTION:
The IDT71342 is an extremely high-speed 4K x 8 Dual-Port
Static RAM with full on-chip hardware support of semaphore
signalling between the two ports.
The IDT71342 provides two independent ports with separate
control, address, and I/O pins that permit independent,
asynchronous access for reads or writes to any location in
memory. To assist in arbitrating between ports, a fully
independent semaphore logic block is provided. This block
contains unassigned flags which can be accessed by either
side; however, only one side can control the flag at any time.
An automatic power down feature, controlled by
CE
and
SEM
,
permits the on-chip circuitry of each port to enter a very low
standby power mode (both
CE
and
SEM
High).
Fabricated using IDT’s CMOS high-performance
technology, this device typically operates on only 500mW of
power. Low-power (LA) versions offer battery backup data
retention capability, with each port typically consuming 200µW
from a 2V battery. The device is packaged in either a 64-pin
TQFP, thin quad plastic flatpack, or a 52-pin PLCC.
FUNCTIONAL BLOCK DIAGRAM
R/
W
L
CE
L
CE
R
R/
W
R
OE
L
I/O
0L
- I/O
7L
COLUMN
I/O
COLUMN
I/O
OE
R
I/O
0R
- I/O
7R
MEMORY
ARRAY
SEMAPHORE
LOGIC
SEM
L
A
0L
- A
11L
LEFT SIDE
ADDRESS
DECODE
LOGIC
RIGHT SIDE
ADDRESS
DECODE
LOGIC
SEM
R
A
0R
- A
11R
2721 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
©1996 Integrated Device Technology, Inc.
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.
OCTOBER 1996
DSC-2721/4
6.05
1
IDT71342SA/LA
HIGH-SPEED 4K x 8 DUAL-PORT STATIC RAM WITH SEMAPHORE
COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATIONS
(1,2)
SEM
L
SEM
R
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
Com’l.
–0.5 to +7.0
Mil.
–0.5 to +7.0
Unit
V
W
R
W
L
A
11R
A
10R
INDEX
7 6 5
A
1L
A
2L
A
3L
A
4L
A
5L
A
6L
A
7L
A
8L
A
9L
I/O
0L
I/O
1L
I/O
2L
I/O
3L
8
9
10
11
12
13
14
15
16
17
18
4 3
2
1
52 51 50 49 48 47
46
45
44
43
42
41
40
39
38
37
36
V
TERM
(2)
Terminal Voltage
with Respect
to Ground
A
10L
A
11L
A
0L
CE
R
OE
L
CE
L
V
CC
R/
R/
OE
R
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
A
6R
A
7R
A
8R
A
9R
N/C
I/O
7R
T
A
T
BIAS
T
STG
P
T
(3)
I
OUT
Operating
Temperature
Temperature
Under Bias
Storage
Temperature
Power Dissipation
DC Output Current
0 to +70
–55 to +125
–55 to +125
1.5
50
–55 to +125
–65 to +135
–65 to +150
1.5
50
°C
°C
°C
W
mA
IDT71342
J52-1
PLCC
(3)
TOP VIEW
19
35
34
20
21 22 23 24 25 26 27 28 29 30 31 32 33
2721 drw 02
NOTES:
2721 tbl 01
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
2. V
TERM
must not exceed Vcc + 0.5V for more than 25%of the cycle time or
10 ns maximum, and is limited to < 20mA for the period of V
TERM
> Vcc
+0.5V.
I/O
4L
I/O
5L
N/C
GND
I/O
0R
I/O
1R
I/O
2R
I/O
3R
I/O
4R
I/O
5R
SEM
R
SEM
L
W
R
R/
L
A
11R
A
10R
N/C
N/C
N/C
N/C
A
10L
A
11L
V
CC
N/C
R/
CE
R
CE
L
W
I/O
6R
I/O
6L
I/O
7L
INDEX
CAPACITANCE
(1)
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
OE
L
A
0L
A
1L
A
2L
A
3L
A
4L
A
5L
A
6L
N/C
A
7L
A
8L
A
9L
N/C
I/O
0L
I/O
1L
I/O
2L
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
OE
R
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
A
6R
N/C
A
7R
A
8R
A
9R
N/C
N/C
I/O
7R
I/O
6R
(T
A
= +25°C, f = 1.0MHz) TQFP Only
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Conditions
(2)
V
IN
= 3dV
V
OUT
= 3dV
Max.
9
10
Unit
pF
pF
71342
PN64-1
64-PIN TQFP
(3)
TOP VIEW
NOTES:
2721 tbl 02
1. This parameter is determined by device characterization but is not
production tested.
2. 3dv references the interpolated capacitance when the input and output
signals switch from 0V to 3V and from 3V to 0V.
RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE
Grade
Commercial
Ambient
Temperature
0°C to +70°C
GND
0V
V
CC
5.0V
±
10%
2721 tbl 03
I/O
3L
N/C
I/O
4L
I/O
5L
I/O
6L
I/O
7L
N/C
N/C
GND
I/O
0R
I/O
1R
I/O
2R
I/O
3R
N/C
I/O
4R
I/O
5R
2721 drw 03
NOTES:
1. All Vcc pins must be connected to the power supply.
2. All GND pins must be connected to the ground supply.
3. This text does not indicate orientation of the actual part-marking.
RECOMMENDED DC OPERATING CONDITIONS
Symbol
V
CC
GND
V
IH
V
IL
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Min.
4.5
0
2.2
–0.5
(1)
Typ.
5.0
0
—
—
Max.
5.5
0
6.0
(2)
0.8
Unit
V
V
V
V
2721 tbl 04
NOTES:
1. V
IL
(min.) > -1.5V for pulse width less than 10ns.
2. V
TERM
must not exceed Vcc + 0.5V.
6.05
2
IDT71342SA/LA
HIGH-SPEED 4K x 8 DUAL-PORT STATIC RAM WITH SEMAPHORE
COMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE
(V
CC
= 5V
±
10%)
IDT71342SA
Symbol
|I
LI
|
|I
LO
|
V
OL
V
OH
Parameter
Input Leakage Current
(1)
Output Leakage Current
Output Low Voltage
Output High Voltage
Test Conditions
V
CC
= 5.5V, V
IN
= 0V to V
CC
Min.
—
—
—
—
2.4
Max.
10
10
0.4
0.5
—
IDT71342LA
Min.
—
—
—
—
2.4
Max.
5
5
0.4
0.5
—
Unit
µA
µA
V
V
V
2721 tbl 05
CE
= V
IH
, V
OUT
= 0V to V
CC
I
OL
= 6mA
I
OL
= 8mA
I
OH
= –4mA
NOTE:
1. At Vcc < 2.0V input leakages are undefined.
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE
(1)
(V
CC
= 5.0V
±
10%)
71342X20
Symbol
ICC
Parameter
Dynamic Operating
Current
(Both Ports Active)
ICC1
Dynamic Operating
Current
(Semaphores
Both Sides)
Standby Current
(Both Ports—TTL
Level Inputs)
Standby Current
(One Port—TTL
Level Inputs)
Full Standby Current
(Both Ports—All
CMOS Level Inputs)
Test Conditions
Version
COM’L. S
L
71342X25
—
—
280
240
71342X35
—
—
260
220
71342X45
—
—
240
200
71342X55 71342X70
—
—
240
200
—
—
240
200
mA
Typ.
(2)
Max. Typ.
(2)
Max. Typ.
(2)
Max. Typ.
(2)
Max. Typ.
(2)
Max. Typ.
(2)
Max. Unit
—
—
280
240
CE
= V
IL
Outputs Open
SEM
= Don't Care
f = f
MAX
(3)
CE
= V
IH
COM’L. S
—
—
280
240
—
—
200
170
—
—
185
155
—
—
170
140
—
—
170
140
—
—
170
140
mA
ISB1
Outputs Open
L
SEM
< V
IL
f = f
MAX
(3)
CE
L
and
CE
R
= V
IH
COM’L. S
SEM
L
=
SEM
R
> V
IH
L
(3)
f = f
MAX
25
25
—
—
80
80
180
150
25
25
—
—
80
50
180
150
25
25
—
—
75
45
170
140
25
25
—
—
70
40
160
130
25
25
—
—
70
40
160
130
25
25
—
—
70
40
160
130
mA
ISB2
CE
"A"
= V
IL
and
CE
"B"
= V
IH
(5)
COM’L. S
L
mA
ISB3
ISB4
Full Standby Current
(One Port—All
CMOS Level Inputs)
Active Port Outputs
Open, f = f
MAX
(3)
Both Ports
CE
L
and COM’L. S
CE
R
> V
CC
- 0.2V
L
V
IN
> V
CC
- 0.2V or
V
IN
< 0.2V
SEM
L
=
SEM
R
>
V
CC
- 0.2V, f = 0
(4)
One Port
CE
"A"
or
COM’L. S
CE
"B"
> V
CC
- 0.2V
L
V
IN
> V
CC
- 0.2V or
V
IN
< 0.2V
SEM
L
=
SEM
R
>
V
CC
- 0.2V
Active Port Outputs
Open, f = f
MAX
(3)
1.0
0.2
15
4.5
1.0
0.2
15
4.0
1.0
0.2
15
4.0
1.0
0.2
15
4.0
1.0
0.2
15
4.0
1.0
0.2
15
4.0
mA
—
—
170
140
—
—
170
140
—
—
150
130
—
—
150
120
—
—
150
120
—
—
150
120
mA
NOTES:
1. “X” in part number indicates power rating (SA or LA).
2. V
CC
= 5V, T
A
= +25°C for typical values, and parameters are not production tested.
3. f
MAX
= 1/t
RC
= All inputs cycling at f = 1/t
RC
(except Output Enable).
4. f = 0 means no address or control lines change. Applies only to inputs at CMOS level standby I
SB3.
5. Port "A" may be either left or right port. Port "B" is opposite from port "A".
2721 tbl 06
6.05
3
IDT71342SA/LA
HIGH-SPEED 4K x 8 DUAL-PORT STATIC RAM WITH SEMAPHORE
COMMERCIAL TEMPERATURE RANGE
DATA RETENTION CHARACTERISTICS
(LA Version Only) V
LC
= 0.2V, V
HC
= V
CC
- 0.2V
Symbol
V
DR
I
CCDR
t
CDR(3)
t
R(3)
Parameter
VCC for Data Retention
Data Retention Current
Test Condition
—
V
CC
= 2V,
CE
≥
V
HC
COM’L.
Min.
2.0
—
Typ.
(1)
—
100
Max.
—
1500
Unit
V
µA
SEM
≥
V
HC
Chip Deselect to Data Retention Time
Operation Recovery Time
V
IN
≥
V
HC
or
≤
V
LC
0
t
RC(2)
—
—
—
—
ns
ns
2721 tbl 07
NOTES:
1. V
CC
= 2V, T
A
= +25°C, and are not production tested.
2. t
RC
= Read Cycle Time.
3. This parameter is guaranteed by device characterization, but is not production tested.
DATA RETENTION WAVEFORM
DATA RETENTION MODE
V
CC
4.5V
t
CDR
V
DR
≥
2V
V
DR
4.5V
t
R
V
IH
2721 drw 04
CE
V
IH
AC TEST CONDITIONS
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
5ns
1.5V
1.5V
Figures 1 and 2
2721 tbl 08
+5V
1250Ω
DATA
OUT
775Ω
30pF
2721 drw 05
+5V
1250Ω
DATA
OUT
775Ω
5pF *
2721 drw 06
Figure 1. AC Output Test Load
Figure 2. Output Test Load
(for t
LZ
, t
HZ
, t
WZ
, t
OW
)
*Including scope and jig
6.05
4
IDT71342SA/LA
HIGH-SPEED 4K x 8 DUAL-PORT STATIC RAM WITH SEMAPHORE
COMMERCIAL TEMPERATURE RANGE
AC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE
(4)
71342X20
Symbol
READ CYCLE
t
RC
t
AA
t
ACE
t
AOE
t
OH
t
LZ
t
HZ
t
PU
t
PD
t
SOP
t
WDD
t
DDD
t
SAA
Read Cycle Time
Address Access Time
Chip Enable Access Time
(3)
Output Enable Access Time
Output Hold from Address Change
Output Low-Z Time
(1, 2)
Output High-Z Time
(1, 2)
Chip Enable to Power Up Time
(2)
Chip Disable to Power Down Time
(2)
SEM Flag Update Pulse (
OE
or
SEM
)
Write Pulse to Data Delay
(4)
Write Data Valid to Read Data Delay
(4)
Semaphore Address Access Time
20
—
—
—
0
0
—
0
—
—
—
—
—
—
20
20
15
—
—
15
—
50
—
40
30
—
25
—
—
—
0
0
—
0
—
10
—
—
—
—
25
25
15
—
—
15
—
50
—
50
30
25
35
—
—
—
0
0
—
0
—
15
—
—
—
—
35
35
20
—
—
20
—
50
—
60
35
35
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2721 tbl 09
71342X25
Min.
Max.
71342X35
Min.
Max.
Unit
Parameter
Min.
Max.
AC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE
(4)
(CONT'D)
71342X45
Symbol
READ CYCLE
t
RC
t
AA
t
ACE
t
AOE
t
OH
t
LZ
t
HZ
t
PU
t
PD
t
SOP
t
WDD
t
DDD
t
SAA
Read Cycle Time
Address Access Time
Chip Enable Access Time
(3)
Output Enable Access Time
Output Hold from Address Change
Output Low-Z Time
(1, 2)
71342X55
Min.
55
—
—
—
0
5
—
0
—
20
—
—
—
Max.
—
55
55
30
—
—
25
—
50
—
80
55
55
71342X70
Min.
70
—
—
—
0
5
—
0
—
20
—
—
—
Max.
—
70
70
40
—
—
30
—
50
—
90
70
70
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2721 tbl 10
Parameter
Min.
45
—
—
—
0
5
—
0
—
15
—
—
—
Max.
—
45
45
25
—
—
20
—
50
—
70
45
45
Output High-Z Time
(1, 2)
Chip Enable to Power Up Time
(2)
Chip Disable to Power Down Time
(2)
SEM Flag Update Pulse (
OE
or
Write Pulse to Data Delay
(4)
Write Data Valid to Read Data Delay
(4)
Semaphore Address Access Time
SEM
)
NOTES:
1. Transition is measured
±500mV
from Low or High-impedance voltage with the Ouput Test Load (Figure 2).
2. This parameter is guaranteed by device characterization, but is not production tested.
3. To access RAM,
CE
= V
IL,
SEM
= V
IH
. To access semaphore,
CE
= V
IH
, and
SEM
= V
IL
.
4. “X” in part number indicates power rating (SA or LA).
6.05
5
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