NAND02GR3B2CZA6E datasheet, PDF

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NAND02GR3B2CZA6E: Description256M X 8 FLASH 3V PROM, 25000 ns, PDSO48; Categorystorage storage; File Size506KB，62 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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NAND02GR3B2CZA6E Overview

256M X 8 FLASH 3V PROM, 25000 ns, PDSO48

NAND02GR3B2CZA6E Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	STMicroelectronics
Parts packaging code	BGA
package instruction	TFBGA, BGA63,10X12,32
Contacts	63
Reach Compliance Code	compli
ECCN code	3A991.B.1.A
Maximum access time	25000 ns
command user interface	YES
Data polling	NO
JESD-30 code	R-PBGA-B63
length	12 mm
memory density	2147483648 bi
Memory IC Type	FLASH
memory width	8
Number of functions	1
Number of departments/size	2K
Number of terminals	63
word count	268435456 words
character code	256000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	256MX8
Package body material	PLASTIC/EPOXY
encapsulated code	TFBGA
Encapsulate equivalent code	BGA63,10X12,32
Package shape	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH
page size	2K words
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	1.8 V
Programming voltage	1.8 V
Certification status	Not Qualified
ready/busy	YES
Maximum seat height	1.05 mm
Department size	128K
Maximum standby current	0.00005 A
Maximum slew rate	0.015 mA
Maximum supply voltage (Vsup)	1.95 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
switch bit	NO
width	9.5 mm

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NAND01G-B2B

NAND02G-B2C

1 Gbit, 2 Gbit,

2112 Byte/1056 Word Page, 1.8V/3V, NAND Flash Memory

Features

■

High Density NAND Flash memories

–

Up to 2 Gbit memory array

Cost effective solutions for mass

storage applications

x8 or x16 bus width

Multiplexed Address/ Data

Pinout compatibility for all densities

FBGA

■

NAND interface

–

TSOP48 12 x 20mm

■

Supply voltage: 1.8V/3.0V

Page size

–

x8 device: (2048 + 64 spare) Bytes

x16 device: (1024 + 32 spare) Words

■

VFBGA63 9.5 x 12 x 1mm

VFBGA63 9 x 11 x 1mm

■

Block size

–

x8 device: (128K + 4K spare) Bytes

x16 device: (64K + 2K spare) Words

Random access: 25µs (max)

Sequential access: 30ns (min)

Page program time: 200µs (typ)

Serial Number option

Data protection

–

Hardware Block Locking

Hardware Program/Erase locked during

Power transitions

100,000 Program/Erase cycles

10 years Data Retention

■

Page Read/Program

–

■

Data integrity

–

■

Copy Back Program mode

Cache Program and Cache Read modes

Fast Block Erase: 2ms (typ)

Status Register

Electronic Signature

Chip Enable ‘don’t care’

Product List

Reference

NAND01G-B2B

■

ECOPACK

packages

Development tools

–

Error Correction Code models

Bad Blocks Management and Wear

Leveling algorithms

Hardware simulation models

Table 1.

Part Number

NAND01GR3B2B, NAND01GW3B2B

NAND01GR4B2B

NAND01GW4B2B

(1)

NAND02GR3B2C, NAND02GW3B2C

NAND02G-B2C

1. x16 organization only available for MCP Products.

NAND02GR4B2C, NAND02GW4B2C

(1)

November 2006

Rev 3

1/62

www.st.com

Contents

NAND01G-B2B, NAND02G-B2C

Contents

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Memory array organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.1

Bad blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Signals description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.1

3.2

3.3

3.4

3.5

3.6

3.7

3.8

3.9

3.10

3.11

Inputs/Outputs (I/O0-I/O7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Inputs/Outputs (I/O8-I/O15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Address Latch Enable (AL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Command Latch Enable (CL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Chip Enable (E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Read Enable (R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Write Enable (W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Write Protect (WP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Ready/Busy (RB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Bus operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4.1

4.2

4.3

4.4

4.5

4.6

Command Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Address Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Data Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Data Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Write Protect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Command Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Device operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

6.1

Read Memory Array . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

6.1.1

6.1.2

Random Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Page Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

2/62

NAND01G-B2B, NAND02G-B2C

Contents

6.2

6.3

Cache Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Page Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

6.3.1

6.3.2

Sequential Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Random Data Input in a page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

6.4

6.5

6.6

6.7

6.8

Copy Back Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Cache Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Block Erase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Read Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

6.8.1

6.8.2

6.8.3

6.8.4

6.8.5

6.8.6

Write Protection Bit (SR7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

P/E/R Controller and Cache Ready/Busy Bit (SR6) . . . . . . . . . . . . . . . 31

P/E/R Controller Bit (SR5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Cache Program Error Bit (SR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Error Bit (SR0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

SR4, SR3 and SR2 are Reserved . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

6.9

Read Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Data protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Software algorithms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

8.1

8.2

8.3

8.4

8.5

8.6

Bad Block Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

NAND Flash memory failure modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Garbage Collection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Wear-leveling algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Error Correction Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Hardware Simulation models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

8.6.1

8.6.2

Behavioral simulation models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

IBIS simulations models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Program and Erase Times and Endurance cycles . . . . . . . . . . . . . . . . 40

Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

DC And AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

11.1

11.2

Ready/Busy Signal electrical characteristics . . . . . . . . . . . . . . . . . . . . . . 54

Data Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

3/62

NAND01G-B2B, NAND02G-B2C

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Table 26.

Table 27.

Table 28.

Table 29.

Table 30.

Product List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Valid Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Bus Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Address Insertion, x8 Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Address Insertion, x16 Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Address Definitions, x8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Address Definitions, x16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Copy Back Program x8 Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Copy Back Program x16 Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Status Register Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Electronic Signature Byte 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Electronic Signature Byte/Word 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

NAND Flash failure modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Program, Erase Times and Program Erase Endurance Cycles . . . . . . . . . . . . . . . . . . . . . 40

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Operating and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

DC Characteristics, 1.8V Devices. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

DC Characteristics, 3V Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

AC Characteristics for Command, Address, Data Input . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

AC Characteristics for Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

TSOP48 - 48 lead Plastic Thin Small Outline, 12 x 20 mm, Package Mechanical Data. . . 57

VFBGA63 9.5x12mm - 6x8 active ball array, 0.80mm pitch, Package Mechanical Data . . 58

VFBGA63 9x11mm - 6x8 active ball array, 0.80mm pitch, Package Mechanical Data . . . 59

Ordering Information Scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

5/62

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