1107C65M00000BX datasheet, PDF

Datasheet> All Categories > Passive components> oscillator> 1107C65M00000BX

1107C65M00000BX: DescriptionTTL Output Clock Oscillator, 65MHz Nom, PLASTIC, FLAT PACKAGE-12; CategoryPassive components oscillator; File Size456KB，22 Pages; ManufacturerVectron International, Inc.; Websitehttp://www.vectron.com/

Download Datasheet Parametric View All

1107C65M00000BX Overview

TTL Output Clock Oscillator, 65MHz Nom, PLASTIC, FLAT PACKAGE-12

1107C65M00000BX Parametric

Parameter Name	Attribute value
package instruction	PLASTIC, FLAT PACKAGE-12
Reach Compliance Code	compliant
maximum descent time	5 ns
Frequency Adjustment - Mechanical	NO
frequency stability	50%
JESD-609 code	e4
Manufacturer's serial number	1107
Installation features	THROUGH HOLE MOUNT
Nominal operating frequency	65 MHz
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Oscillator type	TTL
Output load	10 TTL
physical size	15.88mm x 15.88mm x 3.56mm
longest rise time	5 ns
Nominal supply voltage	3.3 V
surface mount	NO
maximum symmetry	60/40 %
Terminal surface	GOLD
Base Number Matches	1

Preview

Download Datasheet

View All

REV

DESCRIPTION

CO-14428

DATE

4/30/09

PREP

DF/LT

APPD

DATE

PREPARED BY

QUALITY

ENGINEERING

VECTRON INTERNATIONAL

MOUNT HOLLY SPRINGS, PA 17065

Stan Carpenter

SWP

S. Carpenter

10/26/00

11/1/00

10/30/00

Oscillator Specification, Hybrid Clock

Hi-Rel Standard

CODE IDENT NO

SIZE

DWG. NO.

REV

00136

OS-68338

UNSPECIFIED TOLERANCES: N/A

SHEET 1 0F 20

1.1

SCOPE

General. This specification defines the design, assembly and functional evaluation of high

reliability, hybrid clock oscillators produced by Vectron International. Devices delivered to

this specification represent the standardized Parts, Materials and Processes (PMP) Program

developed, implemented and certified for advanced applications and extended environments.

Applications Overview. The designs represented by these products were primarily developed

for the MIL-Aerospace community. The lesser Design Pedigrees and Screening Options

imbedded within OS-68338 bridge the gap between Space and COTS hardware by providing

custom hardware with measures of mechanical, assembly and reliability assurance needed for

Military or Ruggedized COTS environments.

1.2

2.1

APPLICABLE DOCUMENTS

Specifications and Standards. The following specifications and standards form a part of this

document to the extent specified herein. The issue currently in effect on the date of quotation

will be the product baseline, unless otherwise specified. In the event of conflict between the

texts of any references cited herein, the text of this document shall take precedence.

Military

MIL-PRF-55310

MIL-PRF-38534

Standards

MIL-STD-202

MIL-STD-883

MIL-STD-1686

Oscillators, Crystal Controlled, General Specification For

Hybrid Microcircuits, General Specification For

Test Method Standard, Electronic and Electrical Component Parts

Test Methods and Procedures for Microelectronics

Electrostatic Discharge Control Program for Protection of Electrical and

Electronic Parts, Assemblies and Equipment

Other

HT-67849

QSP-90100

VL-65339

Test Specification, OS-68338 Hybrids, Hi-Rel Standard

Quality Systems Manual, Vectron International

Identification Common Documents, Materials and Processes, Hi-Rel XO

3.1

GENERAL REQUIREMENTS

Classification. All devices delivered to this specification are of hybrid technology conforming

to Type 1, Class 2 of MIL-PRF-55310. Primarily developed as a Class S equivalent

specification, options are imbedded within it to also produce Class B, Engineering Model and

Ruggedized COTS devices. Devices carry a Class 2 ESDS classification.

SIZE

CODE IDENT NO.

UNSPECIFIED TOLERANCES

DWG NO.

REV.

SHEET

00136

N/A

OS-68338

3.2

Item Identification. External packaging choices are of metal flatpacks, DIP’s and ceramic J-

lead 9x14mm and LCC’s with either TTL or ACMOS logic output. Unique Model Number

Series’ are utilized to identify device package configurations and output logic as listed in Table

Absolute Maximum Ratings.

a. Supply Voltage Range (V

b. Storage Temperature Range (T

STG

c. Junction Temperature (T

d. Lead Temperature (soldering, 10 seconds):

e. Output Source/Sink Current

3.3

-0.5Vdc to +7.0Vdc

-65°C to +125°C

+175°C

+300°C

±70 mA

3.4

3.4.1

Design, Parts, Materials and Processes, Assembly, Inspection and Test.

Design. The ruggedized designs implemented for these devices are proven in military and

space applications under extreme environments. Designs utilize 4-point crystal mounting in

compliment with Established Reliability (MIL-ER) componentry. When specified, radiation

hardening up to 100krad(Si) (RHA level R) can be included without altering the device’s

internal topography.

3.4.1.1 Design and Configuration Stability. Barring changes to improve performance by reselecting

passive chip component values to offset component tolerances, there will not be fundamental

changes to the design or assembly or parts, materials and processes after first product delivery

of that item without written approval from the procuring activity.

3.4.1.2 Environmental Integrity. Designs have passed the environmental qualification levels of MIL-

PRF-55310. These designs have also passed extended dynamic levels of at least:

Sine Vibration: MIL-STD-202, Method 204, Condition G (30g pk.)

Random Vibration: MIL-STD-202, Method 214, Condition II-J (43.92g rms)

Mechanical Shock: MIL-STD-202, Method 213, Condition F (1500g, 0.5ms)

3.4.2

Prohibited Parts, Materials and Processes. The items listed are prohibited for use in high

reliability devices produced to this specification.

a. Gold metallization of package elements without a barrier metal.

b. Zinc chromate as a finish.

c. Cadmium, zinc, or pure tin external or internal to the device.

d. Plastic encapsulated semiconductor devices.

e. Ultrasonically cleaned electronic parts.

f. Heterojunction Bipolar Transistor (HBT) technology.

g. ‘getter’ materials

Assembly. Manufacturing utilizes standardized procedures, processes and verification

methods to produce MIL-PRF-55310 Class S / MIL-PRF-38534 Class K equivalent devices.

MIL-PRF-38534 Group B Option 1 in-line inspection is included on radiation hardened part

numbers to further verify lot pedigree. Traceability of all components and production lots are

UNSPECIFIED TOLERANCES

3.4.3

SIZE

CODE IDENT NO.

DWG NO.

REV.

SHEET

00136

N/A

OS-68338

in accordance with MIL-PRF-38534, as a minimum. Tabulated records are provided as a part

of the deliverable data package. Devices are handled in accordance with MIL-STD-1686 for

Class 1 devices.

3.4.4

Inspection. The inspection requirements of MIL-PRF-55310 apply to all devices delivered to

this document. Inspection conditions and standards are documented in accordance with the

Quality Assurance, ISO-9001 derived, System of QSP-90100.

Test. The Screening test matrix of Table 5 is tailored for selectable-combination testing to

eliminate costs associated with the development/maintenance of device-specific documentation

packages while maintaining performance integrity.

Marking. Device marking shall be in accordance with the requirements of MIL-PRF-55310.

Ruggedized COTS Design Implementation. Design Pedigree “D” devices (see ¶ 5.2) use the

same robust designs found in the other device pedigrees. They do not include the provisions of

traceability or the Class-qualified componentry noted in paragraphs 3.4.3 and 4.1.

3.4.5

3.4.6

3.4.7

4.1

4.1.1

DETAIL REQUIREMENTS

Components

Crystals. Cultured quartz crystal resonators are used to provide the selected frequency for the

devices. The optional use of Premium Q swept quartz can, because of its processing to remove

impurities, be specified for better frequency aging characteristics. In accordance with MIL-

PRF-55310, the manufacturer has a documented crystal element evaluation program.

Passive Components. Established Reliability (ER) failure level R minimum passive

components are procured from QPL suppliers. Lot evaluations are in accordance with MIL-

PRF-55310 or Enhanced Element Evaluation as specified in Table 7.

Class S Microcircuits. Microcircuits are procured from wafer lots that have passed MIL-PRF-

55310 Lot Acceptance Tests for Class S devices. The prescribed die carries a Class 2 ESDS

classification in accordance with MIL-PRF-38535. When optionally specified, further testing

in accordance with MIL-PRF-55310 and MIL-PRF-38534 is performed for radiation hardness

assurance and for Enhanced Element Evaluation as specified in Table 6. Those microcircuits,

identified by a unique part number, are certified for 100krad(Si) total ionizing dose (TID),

RHA level R (2X minimum margin). NSC, as the original 54ACT designer, rates the SEU

LET at >40 MeV and SEL at >120MeV for the FACT™ family (AN-932). Vectron has

conducted additional SEE testing in 2008 to verify this performance since our lot wafer testing

does not include these parameters and determinations.

4.1.2

4.1.3

SIZE

CODE IDENT NO.

UNSPECIFIED TOLERANCES

DWG NO.

REV.

SHEET

00136

N/A

OS-68338

4.1.3.1 Class B Microcircuits. When specified, microcircuits assembled into OS-68338 Design

Pedigree letters “B” and “C” devices (¶ 5.2a) are procured from wafer lots that have passed

MIL-PRF-55310 element evaluations for Class B devices.

4.1.4

Packages. Packages are procured that meet the construction, lead materials and finishes as

specified in MIL-PRF-55310. Package lots are upscreened in accordance with the

requirements of MIL-PRF-38534 as applicable.

Traceability. Class S active device lots are homogenous and traceable to the manufacturer’s

individual wafer. Swept Quartz Crystals are traceable to the quartz bar and the processing

details of the autoclave lot, as applicable. All other elements and materials are traceable to

their manufacturer and incoming inspection lots.

Enhanced Element Evaluation. When Design Pedigree Option “E” is specified, active and

passive devices with Enhanced Element Evaluation as listed in Table 6 and 7 shall be

implemented for the highest reliability preference.

Mechanical.

Package Outline. Table 1 links each Hi-Rel Standard Model Number of this specification to a

corresponding package style. Mechanical Outline information of each package style is found

in the referenced Figure.

Thermal Characteristics. The worst case thermal characteristics of each package style are

found in Table 4.

Electrical.

Input Power. Devices are designed for standard 5.0 volt dc operation, ±10%. Optional 3.3

Vdc (±10%) input performance for ACMOS output conditions. Current is measured, no load,

at maximum rated operating voltage.

Temperature Range. Operating range is -55°C to +125°C.

Frequency Tolerance. Initial accuracy at +23°C is ±15 ppm maximum. Frequency-

Temperature Stability is ±50 ppm maximum from +23°C reference. Frequency-Voltage

Tolerance is ±4 ppm maximum.

Frequency Aging. Aging limits, and when tested in accordance with MIL-PRF-55310 Group B

inspection, shall not exceed ±1 ppm the first 30 days, ±5 ppm Year 1 and ±2 ppm per year

thereafter. When screening Option F is selected, aging is performed on 100% of the lot and

Vectron does not apply the PDA as specified in MIL-PRF-55310. Data will be presented for

each individual unit to show compliance to the aging limit.

4.1.5

4.1.6

4.2

4.2.1

4.2.2

4.3

4.3.1

4.3.2

4.3.3

4.3.4

SIZE

CODE IDENT NO.

UNSPECIFIED TOLERANCES

DWG NO.

REV.

SHEET

00136

N/A

OS-68338

Recommended Resources

Low power consumption timing circuit

Thermometer bridge circuit diagram

Simple thyristor dimming light circuit

614-C3 (5kVA) AC voltage regulator circuit

Small two-cell battery booster MAX856 circuit diagram

Computer motherboard circuit diagram 815 4_65

【sram】Please tell me the No.4 Back to Back write operation timing of IS61LV25616: The timing is as attached:I would like to ask if back to back write means continuous write? Specific application: There is a large amount of data to read/write SRAM, does SRAM have block operation? If...; threetigher DSP and ARM Processors

After discrete spectrum interpolation?: I would like to ask you, what will happen after the discrete spectrum is interpolated? For example, I have a 28.8MHz signal with a rate of 61.44MSPS, and I interpolate it by 2 times to a rate of 122.8...; eeleader-mcu FPGA/CPLD

How Car Electronic Anti-theft Tracking System Works: People who are familiar with mobile phones know that mobile phones have positioning functions. By sending the specified letters to a specific number, you can get a text message reply to inform you of ...; rhcaxiu Sensor

EEWORLD University Hall----Industrial Application and Innovation of TI DLP Technology: Industrial Application and Innovation of TI DLP Technology : https://training.eeworld.com.cn/course/3677...; wanglan123 Talking

Good things to learn VHDL: :hug: :hug: :hug: :victory:...; lzx_718 FPGA/CPLD

[Project source code] Audio acquisition + FFT spectrum analysis + VGA display spectrum value based on FPGA: It's not original, I downloaded it from the Internet, but I made some modifications. The original program used registers to implement 9K of memory, which consumed a lot of logic resources. I changed i...; 小梅哥 FPGA/CPLD

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components