MX29LV800TTI-70R datasheet, PDF

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MX29LV800TTI-70R: Description8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY; Categorystorage storage; File Size880KB，60 Pages; ManufacturerMacronix; Websitehttp://www.macronix.com/en-us/Pages/default.aspx

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MX29LV800TTI-70R Overview

8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY

MX29LV800TTI-70R Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Macronix
Parts packaging code	TSOP1
package instruction	TSOP1, TSSOP48,.8,20
Contacts	48
Reach Compliance Code	unknow
ECCN code	EAR99
Maximum access time	70 ns
Spare memory width	8
startup block	TOP
command user interface	YES
Data polling	YES
Durability	100000 Write/Erase Cycles
JESD-30 code	R-PDSO-G48
JESD-609 code	e0
length	18.4 mm
memory density	8388608 bi
Memory IC Type	FLASH
memory width	16
Number of functions	1
Number of departments/size	1,2,1,15
Number of terminals	48
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	512KX16
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP1
Encapsulate equivalent code	TSSOP48,.8,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Programming voltage	3 V
Certification status	Not Qualified
ready/busy	YES
Maximum seat height	1.2 mm
Department size	16K,8K,32K,64K
Maximum standby current	0.000005 A
Maximum slew rate	0.03 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN LEAD
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
switch bit	YES
type	NOR TYPE
width	12 mm

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PRELIMINARY

MX29LV800T/B

8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE

3V ONLY FLASH MEMORY

FEATURES

• Extended single - supply voltage range 2.7V to 3.6V

• 1,048,576 x 8/524,288 x 16 switchable

• Single power supply operation

- 3.0V only operation for read, erase and program

operation

• Fast access time: 70/90ns

• Low power consumption

- 20mA maximum active current

- 0.2uA typical standby current

• Command register architecture

- Byte/word Programming (9us/11us typical)

- Sector Erase (Sector structure 16K-Bytex1,

8K-Bytex2, 32K-Bytex1, and 64K-Byte x15)

• Auto Erase (chip & sector) and Auto Program

- Automatically erase any combination of sectors with

Erase Suspend capability.

- Automatically program and verify data at specified

address

• Erase suspend/Erase Resume

- Suspends sector erase operation to read data from,

or program data to, any sector that is not being erased,

then resumes the erase.

• Status Reply

- Data polling & Toggle bit for detection of program and

erase operation completion.

• Ready/Busy pin (RY/BY)

- Provides a hardware method of detecting program or

erase operation completion.

• Sector protection

- Hardware method to disable any combination of

sectors from program or erase operations

- Tempoary sector unprotect allows code changes in

previously locked sectors.

• 100,000 minimum erase/program cycles

• Latch-up protected to 100mA from -1V to VCC+1V

• Boot Sector Architecture

- T = Top Boot Sector

- B = Bottom Boot Sector

• Low VCC write inhibit is equal to or less than 2.3V

• Package type:

- 44-pin SOP

- 48-pin TSOP

- 48-pin CSP

• Compatibility with JEDEC standard

- Pinout and software compatible with single-power

supply Flash

GENERAL DESCRIPTION

The MX29LV800T/B is a 8-mega bit Flash memory or-

ganized as 1M bytes of 8 bits or 512K words of 16 bits.

MXIC's Flash memories offer the most cost-effective

and reliable read/write non-volatile random access

memory. The MX29LV800T/B is packaged in 44-pin

SOP, 48-pin TSOP, and 48-ball CSP. It is designed to be

reprogrammed and erased in system or in standard

EPROM programmers.

The standard MX29LV800T/B offers access time as fast

as 70ns, allowing operation of high-speed microproces-

sors without wait states. To eliminate bus contention,

the MX29LV800T/B has separate chip enable (CE) and

output enable (OE) controls.

MXIC's Flash memories augment EPROM functionality

with in-circuit electrical erasure and programming. The

MX29LV800T/B uses a command register to manage

this functionality. The command register allows for 100%

TTL level control inputs and fixed power supply levels

during erase and programming, while maintaining maxi-

mum EPROM compatibility.

MXIC Flash technology reliably stores memory contents

even after 100,000 erase and program cycles. The MXIC

cell is designed to optimize the erase and programming

mechanisms. In addition, the combination of advanced

tunnel oxide processing and low internal electric fields

for erase and program operations produces reliable cy-

cling. The MX29LV800T/B uses a 2.7V~3.6V VCC sup-

ply to perform the High Reliability Erase and auto Pro-

gram/Erase algorithms.

The highest degree of latch-up protection is achieved

with MXIC's proprietary non-epi process. Latch-up pro-

tection is proved for stresses up to 100 milliamps on

address and data pin from -1V to VCC + 1V.

P/N:PM0709

REV. 1.3, JAN. 24, 2002

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