MM0-67204EV-50/883 datasheet, PDF

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MM0-67204EV-50/883: DescriptionFIFO, 4KX9, 50ns, Asynchronous, CMOS, DIE; Categorystorage storage; File Size88KB，15 Pages; ManufacturerAtmel (Microchip)

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MM0-67204EV-50/883 Overview

FIFO, 4KX9, 50ns, Asynchronous, CMOS, DIE

MM0-67204EV-50/883 Parametric

Parameter Name	Attribute value
Maker	Atmel (Microchip)
Parts packaging code	DIE
package instruction	DIE,
Reach Compliance Code	unknown
ECCN code	EAR99
Is Samacsys	N
Maximum access time	50 ns
period time	65 ns
JESD-30 code	X-XUUC-N
memory density	36864 bit
memory width	9
Number of functions	1
word count	4096 words
character code	4000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	4KX9
Exportable	NO
Package body material	UNSPECIFIED
encapsulated code	DIE
Package shape	UNSPECIFIED
Package form	UNCASED CHIP
Parallel/Serial	PARALLEL
Certification status	Not Qualified
Filter level	MIL-STD-883 Class B
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal form	NO LEAD
Terminal location	UPPER
Base Number Matches	1

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M67204E

4 K

9 CMOS Parallel FIFO Rad Tolerant

Introduction

The M67204E implement a first-in first-out algorithm,

featuring asynchronous read/write operations. The FULL

and EMPTY flags prevent data overflow and underflow.

The Expansion logic allows unlimited expansion in word

size and depth with no timing penalties. Twin address

pointers automatically generate internal read and write

addresses, and no external address information are

required for the Atmel Wireless & Microcontrollers

FIFOs. Address pointers are automatically incremented

with the write pin and read pin. The 9 bits wide data are

used in data communications applications where a parity

bit for error checking is necessary. The Retransmit pin

resets the Read pointer to zero without affecting the write

pointer. This is very useful for retransmitting data when

an error is detected in the system.

Using an array of eigh transistors (8 T) memory cell, the

M67204E combine an extremely low standby supply

current (typ = 1.0

µA)

with a fast access time at 40 ns

over the full temperature range. All versions offer battery

backup data retention capability with a typical power

consumption at less than 2

µW.

The M67204E is processed according to the methods of

the latest revision of the MIL STD 883 (class B or S), ESA

SCC 9000 and QML.

Features

First-in first-out dual port memory

4096

9 organisation

Fast access time: 40, 50 ns

Wide temperature range : – 55

°C

to + 125

°C

Fully expandable by word width or depth

Asynchronous read/write operations

Empty, full and half flags in single device mode

Retransmit capability

Bi-directional applications

Battery back-up operation 2 V data retention

TTL compatible

Single 5 V

10 % power supply

High performance SCMOS technology

Rev. G – June 5, 2000

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