DS2012R-120 datasheet, PDF - EEWORLD Datasheet

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DS2012R-120: DescriptionFIFO, 4KX9, 120ns, Asynchronous, CMOS, PQCC32,; Categorystorage storage; File Size22KB，1 Pages; ManufacturerDALLAS; Websitehttp://www.dalsemi.com

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DS2012R-120 Overview

FIFO, 4KX9, 120ns, Asynchronous, CMOS, PQCC32,

DS2012R-120 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	DALLAS
Reach Compliance Code	unknown
Is Samacsys	N
Maximum access time	120 ns
Other features	RETRANSMIT
Maximum clock frequency (fCLK)	7.14 MHz
period time	140 ns
JESD-30 code	S-PQCC-J32
JESD-609 code	e0
memory density	36864 bit
Memory IC Type	OTHER FIFO
memory width	9
Number of functions	1
Number of terminals	32
word count	4096 words
character code	4000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	4KX9
Output characteristics	3-STATE
Exportable	NO
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC32,.5X.6
Package shape	SQUARE
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
Maximum standby current	0.002 A
Maximum slew rate	0.12 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
Base Number Matches	1

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DS2012

4096 x 9 FIFO Chip

FEATURES

PIN ASSIGNMENT

W

D8

D3

D2

D1

D0

XI

FF

Q0

Q1

Q2

Q3

Q8

GND

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

VCC

D4

D5

D6

D7

D2

D1

D0

D3

D8

W

NC

VCC

D4

D5

4 3 2 1 32 31 30

5

29

6

28

7

27

8

26

9

25

10

24

11

23

12

22

13 15

17 19 21

14 16

18

20

Q3

Q8

GND

NC

R

Q4

Q5

32-Pin PLCC

051994 1/1

D6

D7

NC

FL/RT

RS

EF

XO/HF

Q7

Q6

•

First-in, first-out memory-based architecture

•

Flexible 4096 x 9 organization

•

Low-power HCMOS technology

•

Asychronous and simultaneous read/write

•

Bidirectional applications

•

Fully expandable by word width or depth

•

Empty and full warning flags

•

Half-full flag capability in single-device mode

•

Retransmit capability

•

Available in 50 ns, 65 ns, 80 ns, and 120 ns access

times

FL/RT

XI

RS

FF

EF

Q0

XO/HF

Q1

Q7

NC

Q6

Q2

Q5

Q4

R

28-Pin DIP (600 Mil)

•

Optional industrial temperature range -40°C to +85°C

available, designated N

PIN DESCRIPTION

W

R

RS

FL/RT

D

0-8

Q

0-8

XI

XO/HF

FF

EF

V

CC

GND

NC

–

WRITE

READ

RESET

First Load/Retransmit

Data In

Data Out

Expansion In

Expansion Out/Half Full

Full Flag

Empty Flag

5 Volts

Ground

No Connect

DESCRIPTION

The DS2012 FIFO Chip implements a first-in, first-out

algorithm featuring asynchronous read/write opera-

tions, full, empty, and half full flags, and unlimited expan-

sion capability in both word size and depth. The DS2012

is functionally and electrically equivalent to the DS2009

512 x 9 FIFO Chip, with the exceptions listed in the

notes for DC Electrical Characteristics of the DS2009

data sheet. Refer to the DS2009 data sheet for detailed

device description.

ECopyright

1995 by Dallas Semiconductor Corporation.

patents and other intellectual property rights, please refer to

Dallas Semiconductor databooks.

DS2012R-120 Related Products

	DS2012R-120	DS2012RN-50	DS2012R-50	DS2012R-65	DS2012R-80
Description	FIFO, 4KX9, 120ns, Asynchronous, CMOS, PQCC32,	FIFO, 4KX9, 50ns, Asynchronous, CMOS, PQCC32,	FIFO, 4KX9, 50ns, Asynchronous, CMOS, PQCC32,	FIFO, 4KX9, 65ns, Asynchronous, CMOS, PQCC32,	FIFO, 4KX9, 80ns, Asynchronous, CMOS, PQCC32,
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown
Maximum access time	120 ns	50 ns	50 ns	65 ns	80 ns
Other features	RETRANSMIT	RETRANSMIT	RETRANSMIT	RETRANSMIT	RETRANSMIT
Maximum clock frequency (fCLK)	7.14 MHz	15.38 MHz	15.38 MHz	12.5 MHz	10 MHz
JESD-30 code	S-PQCC-J32	S-PQCC-J32	S-PQCC-J32	S-PQCC-J32	S-PQCC-J32
JESD-609 code	e0	e0	e0	e0	e0
memory density	36864 bit	36864 bit	36864 bit	36864 bit	36864 bit
Memory IC Type	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO
memory width	9	9	9	9	9
Number of functions	1	1	1	1	1
Number of terminals	32	32	32	32	32
word count	4096 words	4096 words	4096 words	4096 words	4096 words
character code	4000	4000	4000	4000	4000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	70 °C	85 °C	70 °C	70 °C	70 °C
organize	4KX9	4KX9	4KX9	4KX9	4KX9
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Exportable	NO	NO	NO	NO	NO
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	QCCJ	QCCJ	QCCJ	QCCJ	QCCJ
Encapsulate equivalent code	LDCC32,.5X.6	LDCC32,.5X.6	LDCC32,.5X.6	LDCC32,.5X.6	LDCC32,.5X.6
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
power supply	5 V	5 V	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum standby current	0.002 A	0.002 A	0.002 A	0.002 A	0.002 A
Maximum slew rate	0.12 mA	0.12 mA	0.12 mA	0.12 mA	0.12 mA
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	J BEND	J BEND	J BEND	J BEND	J BEND
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	QUAD	QUAD	QUAD	QUAD	QUAD
Maker	DALLAS	DALLAS	DALLAS	-	DALLAS
period time	140 ns	-	65 ns	80 ns	100 ns
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	-	-	NOT SPECIFIED	NOT SPECIFIED
Maximum supply voltage (Vsup)	5.5 V	-	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	-	4.5 V	4.5 V	4.5 V
Maximum time at peak reflow temperature	NOT SPECIFIED	-	-	NOT SPECIFIED	NOT SPECIFIED
Base Number Matches	1	1	1	1	-

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