M28W800BT
M28W800BB
8 Mbit (512Kb x16, Boot Block)
3V Supply Flash Memory
FEATURES SUMMARY
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SUPPLY VOLTAGE
– V
DD
= 2.7V to 3.6V Core Power Supply
– V
DDQ
= 1.65V to 3.3V for Input/Output
– V
PP
= 12V for fast Program (optional)
s
s
FBGA
Figure 1. Packages
ACCESS TIME: 70, 85, 90,100ns
PROGRAMMING TIME
– 10µs typical
– Double Word Programming Option
TFBGA46 (ZB)
8 x 6 ball array
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COMMON FLASH INTERFACE
– 64 bit Security Code
MEMORY BLOCKS
– Parameter Blocks (Top or Bottom location)
– Main Blocks
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BLOCK PROTECTION on TWO PARAMETER
BLOCKS
– WP for Block Protection
AUTOMATIC STAND-BY MODE
PROGRAM and ERASE SUSPEND
100,000 PROGRAM/ERASE CYCLES per
BLOCK
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Top Device Code, M28W800BT: 8892h
– Bottom Device Code, M28W800BB: 8893h
TSOP48 (N)
12 x 20mm
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November 2001
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M28W800BT, M28W800BB
TABLE OF CONTENTS
SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. TSOP Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. TFBGA Connections (Top view through package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 5. Block Addresses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
SIGNAL DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Address Inputs (A0-A18). . . . . . . . . . . . . . .
Data Input/Output (DQ0-DQ15). . . . . . . . . .
Chip Enable (E). . . . . . . . . . . . . . . . . . . . . .
Output Enable (G). . . . . . . . . . . . . . . . . . . .
Write Enable (W). . . . . . . . . . . . . . . . . . . . .
Write Protect (WP). . . . . . . . . . . . . . . . . . . .
Reset (RP). . . . . . . . . . . . . . . . . . . . . . . . . .
V
DD
Supply Voltage (2.7V to 3.6V) . . . . . . .
V
DDQ
Supply Voltage (1.65V to V
DD
). . . . . .
V
PP
Program Supply Voltage . . . . . . . . . . .
V
SS
Ground. . . . . . . . . . . . . . . . . . . . . . . . .
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BUS OPERATIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Read. . . . . . . . . . . . . . . . . .
Write. . . . . . . . . . . . . . . . . .
Output Disable. . . . . . . . . .
Standby. . . . . . . . . . . . . . .
Automatic Standby. . . . . . .
Reset. . . . . . . . . . . . . . . . .
Table 2. Bus Operations . .
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COMMAND INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Read Memory Array command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Read Status Register Command. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Read Electronic Signature Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Read CFI Query Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Block Erase Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Program Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Double Word Program Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Clear Status Register Command. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Program/Erase Suspend Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Program/Erase Resume Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Block Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 3. Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 4. Read Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 5. Memory Blocks Protection Truth Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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M28W800BT, M28W800BB
Table 6. Program, Erase Times and Program/Erase Endurance Cycles . . . . . . . . . . . . . . . . . . . . 14
STATUS REGISTER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Program/Erase Controller Status (Bit 7) . . .
Erase Suspend Status (Bit 6) . . . . . . . . . . .
Erase Status (Bit 5) . . . . . . . . . . . . . . . . . . .
Program Status (Bit 4) . . . . . . . . . . . . . . . . .
V
PP
Status (Bit 3). . . . . . . . . . . . . . . . . . . . .
Program Suspend Status (Bit 2) . . . . . . . . .
Block Protection Status (Bit 1). . . . . . . . . . .
Reserved (Bit 0). . . . . . . . . . . . . . . . . . . . . .
Table 7. Status Register Bits . . . . . . . . . . . .
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MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 8. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
DC and AC PARAMETERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 9. Operating and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 6. AC Measurement I/O Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 7. AC Measurement Load Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 10. Device Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 11. DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 8. Read AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 12. Read AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 9. Write AC Waveforms, Write Enable Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 13. Write AC Characteristics, Write Enable Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 10. Write AC Waveforms, Chip Enable Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 14. Write AC Characteristics, Chip Enable Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 11. Power-Up and Reset AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 15. Power-Up and Reset AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 12. TSOP48 - 48 lead Plastic Thin Small Outline, 12 x 20mm, Package Outline . . . . . . . . 26
Table 16. TSOP48 - 48 lead Plastic Thin Small Outline, 12 x 20mm, Package Mechanical Data . 26
Figure 13. TFBGA46 - 8 x 6 ball array, 0.75 mm pitch, Bottom View Package Outline . . . . . . . . . 27
Table 17. TFBGA46 - 8 x 6 ball array, 0.75 mm pitch, Package Mechanical Data . . . . . . . . . . . . . 27
Figure 14. TFBGA46 Daisy Chain - Package Connections (Top view through package) . . . . . . . . 28
Figure 15. TFBGA46 Daisy Chain - PCB Connections proposal (Top view through package) . . . . 28
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 18. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 19. Daisy Chain Ordering Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 20. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
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M28W800BT, M28W800BB
APPENDIX A. BLOCK ADDRESS TABLES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 21. Top Boot Block Addresses, M28W800BT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 22. Bottom Boot Block Addresses, M28W800BB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
APPENDIX B. COMMON FLASH INTERFACE (CFI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 23. Query Structure Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 24. CFI Query Identification String . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 25. CFI Query System Interface Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 26. Device Geometry Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 27. Primary Algorithm-Specific Extended Query Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 28. Security Code Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
APPENDIX C. FLOWCHARTS AND PSEUDO CODES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 16. Program Flowchart and Pseudo Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 17. Double Word Program Flowchart and Pseudo Code . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 18. Program Suspend & Resume Flowchart and Pseudo Code . . . . . . . . . . . . . . . . . . . . . 38
Figure 19. Erase Flowchart and Pseudo Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 20. Erase Suspend & Resume Flowchart and Pseudo Code. . . . . . . . . . . . . . . . . . . . . . . . 40
APPENDIX D. COMMAND INTERFACE AND PROGRAM/ERASE CONTROLLER STATE . . . . . . . 41
Table 29. Write State Machine Current/Next . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
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M28W800BT, M28W800BB
SUMMARY DESCRIPTION
The M28W800B is a 8 Mbit (512Kbit x 16) non-vol-
atile Flash memory that can be erased electrically
at the block level and programmed in-system on a
Word-by-Word basis. These operations can be
performed using a single low voltage (2.7 to 3.6V)
supply. V
DDQ
allows to drive the I/O pin down to
1.65V. An optional 12V V
PP
power supply is pro-
vided to speed up customer programming.
The device features an asymmetrical blocked ar-
chitecture. The M28W800B has an array of 23
blocks: 8 Parameter Blocks of 4 KWord and 15
Main Blocks of 32 KWord. M28W800BT has the
Parameter Blocks at the top of the memory ad-
dress space while the M28W800BB locates the
Parameter Blocks starting from the bottom. The
memory maps are shown in Figure 5, Block Ad-
dresses.
Parameter blocks 0 and 1 can be protected from
accidental programming or erasure. Each block
can be erased separately. Erase can be suspend-
ed in order to perform either read or program in
any other block and then resumed. Program can
be suspended to read data in any other block and
then resumed. Each block can be programmed
and erased over 100,000 cycles.
Program and Erase commands are written to the
Command Interface of the memory. An on-chip
Program/Erase Controller takes care of the tim-
ings necessary for program and erase operations.
The end of a program or erase operation can be
detected and any error conditions identified. The
command set required to control the memory is
consistent with JEDEC standards.
The memory is offered in TSOP48 (10 X 20mm),
and TFBGA46 (0.75mm pitch) packages and is
supplied with all the bits erased (set to ’1’).
Figure 2. Logic Diagram
VDD VDDQ VPP
19
A0-A18
W
E
G
RP
WP
M28W800BT
M28W800BB
16
DQ0-DQ15
VSS
AI03581
Table 1. Signal Names
A0-A18
DQ0-DQ15
E
G
W
RP
WP
V
DD
V
DDQ
V
PP
V
SS
NC
Address Inputs
Data Input/Output
Chip Enable
Output Enable
Write Enable
Reset
Write Protect
Core Power Supply
Power Supply for
Input/Output
Optional Supply Voltage for
Fast Program & Erase
Ground
Not Connected Internally
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