MM74HCT04 Hex Inverter
February 1984
Revised January 2005
MM74HCT04
Hex Inverter
General Description
The MM74HCT04 is a logic function fabricated by using
advanced silicon-gate CMOS technology which provides
the inherent benefits of CMOS - low quiescent power and
wide power supply range. This device is input and output
characteristic as well as pin-out compatible with standard
74LS logic families. The MM74HCT04, triple buffered, hex
inverters, features low power dissipation and fast switching
times. All inputs are protected from static discharge by
internal diodes to V
CC
and ground.
MM74HCT devices are intended to interface between TTL
and NMOS components and standard CMOS devices.
These parts are also plug-in replacements for LS-TTL
devices and can be used to reduce power consumption in
existing designs.
Features
s
TTL, LS pin-out and threshold compatible
s
Fast switching: t
PLH
, t
PHL
=
12 ns (typ)
s
Low power: 10
µ
W at DC, 3.7 mW at 5 MHz
s
High fanout:
≥
10 LS loads
s
Inverting, triple buffered
Ordering Code:
Order Number
MM74HCT04M
MM74HCT04SJ
MM74HCT04MTC
MM74HCT04N
MM74HCT04N_NL
Package
Number
M14A
M14D
MTC14
N14A
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Pb-Free 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Connection Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Top View
© 2005 Fairchild Semiconductor Corporation
DS005357
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MM74HCT04
Absolute Maximum Ratings
(Note 1)
(Note 2)
Supply Voltage (V
CC
)
DC Input Voltage (V
IN
)
DC Output Voltage (V
OUT
)
Clamp Diode Current (I
IK
, I
OK
)
DC Output Current, per pin (I
OUT
)
DC V
CC
or GND Current, per pin (I
CC
)
Storage Temperature Range (T
STG
)
Power Dissipation (P
D
)
(Note 3)
S.O. Package only
Lead Temperature (T
L
)
(Soldering 10 seconds)
260
°
C
600 mW
500 mW
Recommended Operating
Conditions
Min
Supply Voltage (V
CC
)
DC Input or Output Voltage
(V
IN
, V
OUT
)
Operating Temperature Range (T
A
)
Input Rise or Fall Times
(t
r
, t
f
)
500
ns
Note 1:
Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2:
Unless otherwise specified all voltages are referenced to ground.
Note 3:
Power Dissipation temperature derating — plastic “N” package:
−
12 mW/°C from 65°C to 85°C.
−
0.5 to
+
7.0V
−
1.5 to V
CC
+
1.5V
−
0.5 to V
CC
+
0.5V
±
20 mA
±
25 mA
±
50 mA
−
65
°
C to
+
150
°
C
Max
5.5
V
CC
Units
V
V
4.5
0
−
40
+
85
°
C
DC Electrical Characteristics
V
CC
=
5V
±10%
(unless otherwise specified)
Symbol
V
IH
V
IL
V
OH
Parameter
Minimum HIGH Level
Input Voltage
Maximum LOW Level
Input Voltage
Minimum HIGH Level
Output Voltage
V
IN
=
V
IL
|I
OUT
|
=
20
µA
|I
OUT
|
=
4.0 mA, V
CC
=
4.5V
|I
OUT
|
=
4.8 mA, V
CC
=
5.5V
V
OL
Maximum LOW Level
Voltage
V
IN
=
V
IH
|I
OUT
|
=
20
µA
|I
OUT
|
=
4.0 mA, V
CC
=
4.5V
|I
OUT
|
=
4.8 mA, V
CC
=
5.5V
I
IN
I
CC
Maximum Input
Current
Maximum Quiescent
Supply Current
V
IN
=
V
CC
or GND,
V
IH
or V
IL
V
IN
=
V
CC
or GND
I
OUT
=
0
µA
V
IN
=
2.4V or 0.5V (Note 4)
Note 4:
This is measured per input with all other inputs held at V
CC
or ground.
Conditions
T
A
=
25°C
Typ
2.0
0.8
T
A
= −40
to 85°C T
A
= −55
to 125°C
Guaranteed Limits
2.0
0.8
2.0
0.8
Units
V
V
V
CC
4.2
5.2
0
0.2
0.2
V
CC
−
0.1
3.98
4.98
0.1
0.26
0.26
±0.1
2.0
0.3
V
CC
−
0.1
3.84
4.84
0.1
0.33
0.33
±1.0
20
0.4
V
CC
−
0.1
3.7
4.7
0.1
0.4
0.4
±1.0
40
0.5
V
V
V
V
V
V
µA
µA
mA
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2
MM74HCT04
AC Electrical Characteristics
V
CC
=
5.0V, t
r
=
t
f
=
6 ns C
L
=
15 pF, T
A
=
25°C (unless otherwise noted)
Symbol
t
PLH
, t
PHL
Parameter
Maximum Propagation Delay
Conditions
Typ
10
Guaranteed
Limit
18
Units
ns
AC Electrical Characteristics
V
CC
=
5.0V
±
10%, t
r
=
t
f
=
6 ns, C
L
=
50 pF (unless otherwise noted)
Symbol
t
PLH
, t
PHL
t
THL
, t
TLH
C
PD
C
IN
Parameter
Maximum Propagation Delay
Maximum Output Rise & Fall Time
Power Dissipation Capacitance
Input Capacitance
(Note 5)
Conditions
T
A
=
25°C
Typ
14
8
20
5
10
10
10
20
15
T
A
= −40
to 85°C T
A
= −55
to 125°C
Guaranteed Limits
25
19
30
22
Units
ns
ns
pF
pF
Note 5:
C
PD
determines the no load dynamic power consumption, P
D
=
C
PD
V
CC2
f
+
I
CC
V
CC
, and the no load dynamic current consumption,
I
S
=
C
PD
V
CC
f
+
I
CC
.
3
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