(V = 2.5 V to 5.5 V, V = 2 V. R = 2 k to GND; C =200 pF to GND; all specifications T to T unless
DD
REF
L
L
MIN
MAX
Parameter
1
Min
B Version
2
Typ
Max
Unit
Conditions/Comments
DC PERFORMANCE
3, 4
AD5334
Resolution
Relative Accuracy
Differential Nonlinearity
AD5335/AD5336
Resolution
Relative Accuracy
Differential Nonlinearity
AD5344
Resolution
Relative Accuracy
Differential Nonlinearity
Offset Error
Gain Error
Lower Deadband
5
Upper Deadband
Offset Error Drift
6
Gain Error Drift
6
DC Power Supply Rejection Ratio
6
DC Crosstalk
6
DAC REFERENCE INPUT
6
V
REF
Input Range
V
REF
Input Impedance
8
±
0.15
±
0.02
10
±
0.5
±
0.05
12
±
2
±
0.2
±
0.4
±
0.1
10
10
–12
–5
–60
200
±
1
±
0.25
±
4
±
0.5
±
16
±
1
±
3
±
1
60
60
Bits
LSB
LSB
Bits
LSB
LSB
Bits
LSB
LSB
% of FSR
% of FSR
mV
mV
ppm of FSR/°C
ppm of FSR/°C
dB
µV
Guaranteed Monotonic By Design Over All Codes
Guaranteed Monotonic By Design Over All Codes
Guaranteed Monotonic By Design Over All Codes
Lower Deadband Exists Only if Offset Error Is Negative
V
DD
= 5 V. Upper Deadband Exists Only if V
REF =
V
DD
∆V
DD
=
±
10%
R
L
= 2 kΩ to GND, 2 kΩ to V
DD
; C
L
= 200 pF to GND;
Gain = 0
0.25
180
90
90
45
–90
–90
V
DD
Reference Feedthrough
Channel-to-Channel Isolation
OUTPUT CHARACTERISTICS
6
Minimum Output Voltage
4, 7
Maximum Output Voltage
4, 7
DC Output Impedance
Short Circuit Current
Power-Up Time
LOGIC INPUTS
6
Input Current
V
IL
, Input Low Voltage
V
kΩ
kΩ
kΩ
kΩ
dB
dB
V min
V max
Ω
mA
mA
µs
µs
µA
V
V
V
V
V
V
pF
V
µA
µA
µA
µA
Gain = 1. Input Impedance = R
DAC
(AD5336/AD5344)
Gain = 2. Input Impedance = R
DAC
(AD5336)
Gain = 1. Input Impedance = R
DAC
(AD5334/AD5335)
Gain = 2. Input Impedance = R
DAC
(AD5334)
Frequency = 10 kHz
Frequency = 10 kHz
Rail-to-Rail Operation
0.001
V
DD
– 0.001
0.5
50
20
2.5
5
±
1
0.8
0.6
0.5
2.4
2.1
2.0
3.5
2.5
600
500
0.2
0.08
5.5
900
700
1
1
V
DD
= 5 V
V
DD
= 3 V
Coming Out of Power-Down Mode. V
DD
= 5 V
Coming Out of Power-Down Mode. V
DD
= 3 V
V
IH
, Input High Voltage
V
DD
= 5 V
±
10%
V
DD
= 3 V
±
10%
V
DD
= 2.5 V
V
DD
= 5 V
±
10%
V
DD
= 3 V
±
10%
V
DD
= 2.5 V
Pin Capacitance
POWER REQUIREMENTS
V
DD
I
DD
(Normal Mode)
V
DD
= 4.5 V to 5.5 V
V
DD
= 2.5 V to 3.6 V
I
DD
(Power-Down Mode)
V
DD
= 4.5 V to 5.5 V
V
DD
= 2.5 V to 3.6 V
All DACs active and excluding load currents.
V
IH
= V
DD
, V
IL
= GND.
I
DD
increases by 50
µA
at V
REF
> V
DD
– 100 mV.
NOTES
1
See Terminology section.
2
Temperature range: B Version: –40°C to +105°C; typical specifications are at 25°C.
3
Linearity is tested using a reduced code range: AD5334 (Code 8 to 255); AD5335/AD5336 (Code 28 to 1023); AD5344 (Code 115 to 4095).
4
DC specifications tested with outputs unloaded.
5
This corresponds to x codes. x = Deadband voltage/LSB size.
6
Guaranteed by design and characterization, not production tested.
7
In order for the amplifier output to reach its minimum voltage, Offset Error must be negative. In order for the amplifier output to reach its maximum voltage, V
REF
= V
DD
and
“Offset plus Gain” Error must be positive.
Specifications subject to change without notice.
–2–
REV. 0
AD5334/AD5335/AD5336/AD5344
AC CHARACTERISTICS
Parameter
2
Output Voltage Settling Time
AD5334
AD5335
AD5336
AD5344
Slew Rate
Major Code Transition Glitch Energy
Digital Feedthrough
Digital Crosstalk
Analog Crosstalk
DAC-to-DAC Crosstalk
Multiplying Bandwidth
Total Harmonic Distortion
1
(V
DD
= 2.5 V to 5.5 V. R
L
= 2 k to GND; C
L
= 200 pF to GND. All specifications T
MIN
to T
MAX
unless other-
wise noted.)
B Version
3
Min
Typ
Max
6
7
7
8
0.7
8
0.5
3
0.5
3.5
200
–70
8
9
9
10
Unit
µs
µs
µs
µs
V/µs
nV-s
nV-s
nV-s
nV-s
nV-s
kHz
dB
Conditions/Comments
V
REF
= 2 V. See Figure 20
1/4 Scale to 3/4 Scale Change (40 H to C0 H)
1/4 Scale to 3/4 Scale Change (100 H to 300 H)
1/4 Scale to 3/4 Scale Change (100 H to 300 H)
1/4 Scale to 3/4 Scale Change (400 H to C00 H)
1 LSB Change Around Major Carry
V
REF
= 2 V
±
0.1 V p-p. Unbuffered Mode
V
REF
= 2.5 V
±
0.1 V p-p. Frequency = 10 kHz
NOTES
1
Guaranteed by design and characterization, not production tested.
2
See Terminology section.
3
Temperature range: B Version: –40°C to +105°C; typical specifications are at 25°C.
Specifications subject to change without notice.
TIMING CHARACTERISTICS
1, 2, 3
(V
Parameter
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
11
t
12
t
13
t
14
t
15
Limit at T
MIN
, T
MAX
0
0
20
5
4.5
5
5
4.5
5
4.5
20
20
50
20
0
DD
= 2.5 V to 5.5 V, All specifications T
MIN
to T
MAX
unless otherwise noted.)
Unit
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
Condition/Comments
CS
to
WR
Setup Time
CS
to
WR
Hold Time
WR
Pulsewidth
Data, GAIN, HBEN Setup Time
Data, GAIN, HBEN Hold Time
Synchronous Mode.
WR
Falling to
LDAC
Falling.
Synchronous Mode.
LDAC
Falling to
WR
Rising.
Synchronous Mode.
WR
Rising to
LDAC
Rising.
Asynchronous Mode.
LDAC
Rising to
WR
Rising.
Asynchronous Mode.
WR
Rising to
LDAC
Falling.
LDAC
Pulsewidth
CLR
Pulsewidth
Time Between
WR
Cycles
A0, A1 Setup Time
A0, A1 Hold Time
t
1
CS
NOTES
1
Guaranteed by design and characterization, not production tested.
2
All input signals are specified with tr = tf = 5 ns (10% to 90% of V
DD
)
and timed from a voltage level of (V
IL
+ V
IH
)/2.
3
See Figure 1.
Specifications subject to change without notice.
t
2
t
3
t
13
t
4
t
6
t
5
WR
DATA,
GAIN,
HBEN
LDAC
1
t
7
t
9
t
8
t
10
t
11
LDAC
2
CLR
A0,
A1
NOTES:
t
14
t
15
t
12
1
SYNCHRONOUS
LDAC
UPDATE MODE
2
ASYNCHRONOUS
LDAC
UPDATE MODE
Figure 1. Parallel Interface Timing Diagram
REV. 0
–3–
AD5334/AD5335/AD5336/AD5344
ABSOLUTE MAXIMUM RATINGS*
(T
A
= 25°C unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Digital Input Voltage to GND . . . . . . . . –0.3 V to V
DD
+ 0.3 V
Digital Output Voltage to GND . . . . . . –0.3 V to V
DD
+ 0.3 V
Reference Input Voltage to GND . . . . –0.3 V to V
DD
+ 0.3 V
V
OUT
to GND . . . . . . . . . . . . . . . . . . . –0.3 V to V
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