DSPIC33FJ32GP202-H/MM datasheet, PDF

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DSPIC33FJ32GP202-H/MM: Description16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQCC28, 6 X 6 MM, 0.90 MM HEIGHT, LEAD FREE, PLASTIC, QFN-28; CategoryThe embedded processor and controller Microcontrollers and processors; File Size4MB，300 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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DSPIC33FJ32GP202-H/MM Overview

16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQCC28, 6 X 6 MM, 0.90 MM HEIGHT, LEAD FREE, PLASTIC, QFN-28

DSPIC33FJ32GP202-H/MM Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Microchip
Parts packaging code	QFN
package instruction	6 X 6 MM, 0.90 MM HEIGHT, LEAD FREE, PLASTIC, QFN-28
Contacts	28
Reach Compliance Code	compliant
ECCN code	3A001.A.2.A
Is Samacsys	N
Has ADC	YES
Address bus width
bit size	16
CPU series	PIC
maximum clock frequency	40 MHz
DAC channel	NO
DMA channel	NO
External data bus width
JESD-30 code	S-PQCC-N28
JESD-609 code	e3
length	6 mm
Number of I/O lines	21
Number of terminals	28
Maximum operating temperature	150 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	HVQCCN
Encapsulate equivalent code	LCC28,.24SQ,25
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
power supply	3.3 V
Certification status	Not Qualified
RAM (bytes)	2048
rom(word)	32768
ROM programmability	FLASH
Maximum seat height	1 mm
speed	20 MHz
Maximum slew rate	80 mA
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	MATTE TIN
Terminal form	NO LEAD
Terminal pitch	0.65 mm
Terminal location	QUAD
width	6 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

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dsPIC33FJ32GP202/204 and

dsPIC33FJ16GP304

16-Bit Digital Signal Controllers with Advanced Analog

Operating Conditions

• 3.0V to 3.6V, -40°C to +150°C, DC to 20 MIPS

• 3.0V to 3.6V, -40°C to +125°C, DC to 40 MIPS

Timers/Output Compare/Input Capture

• Three 16-bit timers/counters; can pair up two to

make one 32-bit

• Two OC modules, configurable as timers/counters

• Four IC modules

• Peripheral Pin Select (PPS) to allow function

remap

Core: 16-Bit dsPIC33F CPU

•

Code-efficient (C and Assembly) architecture

Two 40-bit wide accumulators

Single-cycle (MAC/MPY) with dual data fetch

Single-cycle, mixed-sign MUL plus hardware

divide

Communication Interfaces

• One UART module (10 Mbps)

- With support for LIN/J2602 protocols and

IrDA

• One 4-wire SPI module (15 Mbps)

• One I

C™ module (up to 1 Mbaud) with

SMBus support

• PPS to allow function remap

Clock Management

•

±2% internal oscillator

Programmable PLLs and oscillator clock sources

Fail-Safe Clock Monitor (FSCM)

Independent Watchdog Timer (WDT)

Fast wake-up and start-up

Input/Output

• Sink/Source up to 10 mA (pin-specific) for

standard V

, up to 16 mA (pin-specific) for

non-standard V

OH1

• 5V tolerant pins

• Selectable open-drain, pull-ups, and pull-downs

• Up to 5 mA overvoltage clamp current

• External interrupts on all I/O pins

Power Management

• Low-power management modes (Sleep, Idle,

Doze)

• Integrated Power-on Reset and Brown-out Reset

• 1.35 mA/MHz dynamic current (typical)

• 55

μA

IPD current (typical)

Advanced Analog Features

• ADC module:

- Configurable as 10-bit, 1.1 Msps with

four S/H (Sample-and-Hold) or 12-bit,

500 ksps with one S/H

- Ten analog inputs on 28-pin devices and up

to 13 analog inputs on 44-pin devices

• Flexible and independent ADC trigger sources

Qualification and Class B Support

• AEC-Q100 REVG (Grade 1 -40°C to +125°C)

• AEC-Q100 REVG (Grade 0 -40°C to +150°C)

• Class B Safety Library, IEC 60730

Debugger Development Support

•

In-circuit and in-application programming

Two program and two complex data breakpoints

IEEE 1149.2-compatible (JTAG) boundary scan

Trace and run-time watch

2007-2011 Microchip Technology Inc.

DS70290J-page 1

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