dsPIC33FJXXXMCX06A/X08A/X10A
16-bit Digital Signal Controllers (up to 256 KB Flash and
30 KB SRAM) with Motor Control and Advanced Analog
Operating Conditions
• 3.0V to 3.6V, -40ºC to +150ºC, DC to 20 MIPS
• 3.0V to 3.6V, -40ºC to +125ºC, DC to 40 MIPS
Timers/Output Compare/Input Capture
• Up to nine 16-bit timers/counters. Can pair up to
make four 32-bit timers.
• Eight Output Compare modules configurable as
timers/counters
• Eight Input Capture modules
Core: 16-bit dsPIC33F CPU
•
•
•
•
Code-efficient (C and Assembly) architecture
Two 40-bit wide accumulators
Single-cycle (MAC/MPY) with dual data fetch
Single-cycle mixed-sign MUL plus hardware
divide
±2% internal oscillator
Programmable PLLs and oscillator clock sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer (WDT)
Fast wake-up and start-up
Communication Interfaces
• Two UART modules (10 Mbps)
- With support for LIN 2.0 protocols and IrDA
®
• Two 4-wire SPI modules (15 Mbps)
• Up to two I
2
C™ modules (up to 1 Mbaud) with
SMBus support
• Up to two Enhanced CAN (ECAN) modules
(1 Mbaud) with 2.0B support
• Quadrature Encoder Interface (QEI) module
• Data Converter Interface (DCI) module with I
2
S
codec support
Clock Management
•
•
•
•
•
Power Management
• Low-power management modes (Sleep, Idle,
Doze)
• Integrated Power-on Reset and Brown-out Reset
• 1.35 mA/MHz dynamic current (typical)
• 55
μA
I
PD
current (typical)
Input/Output
• Sink/Source up to 10 mA (pin specific) for stan-
dard V
OH
/V
OL
, up to 16 mA (pin specific) for non-
standard V
OH1
• 5V-tolerant pins
• Selectable open drain, pull-ups, and pull-downs
• Up to 5 mA overvoltage clamp current
• External interrupts on all I/O pins
Motor Control PWM
•
•
•
•
Up to four PWM generators with eight outputs
Dead Time for rising and falling edges
12.5 ns PWM resolution
PWM support for Motor Control: BLDC, PMSM, ACIM,
and SRM
• Programmable Fault inputs
• Flexible trigger for ADC conversions and configurations
Qualification and Class B Support
• AEC-Q100 REVG (Grade 1 -40ºC to +125ºC)
• AEC-Q100 REVG (Grade 0 -40ºC to +150ºC)
• Class B Safety Library, IEC 60730
Advanced Analog Features
• Two ADC modules:
- Configurable as 10-bit, 1.1 Msps with four
S&H or 12-bit, 500 ksps with one S&H
- 18 analog inputs on 64-pin devices and up to
32 analog inputs on 100-pin devices
• Flexible and independent ADC trigger sources
Debugger Development Support
•
•
•
•
In-circuit and in-application programming
Two program and two complex data breakpoints
IEEE 1149.2-compatible (JTAG) boundary scan
Trace and run-time watch
Packages
Type
QFN
TQFP
64
0.50
53
10x10x1
TQFP
80
0.50
69
12x12x1
TQFP
100
0.40
85
14x14x1
Pin Count
64
Contact Lead/Pitch
0.50
I/O Pins
53
Dimensions
9x9x0.9
Note:
All dimensions are in millimeters (mm) unless specified.
2009-2012 Microchip Technology Inc.
DS70594D-page 1
dsPIC33FJXXXMCX06A/X08A/X10A
dsPIC33F PRODUCT FAMILIES
The dsPIC33FJXXXMCX06A/X08A/X10A family of
devices supports a variety of motor control applications,
such as brushless DC motors, single and 3-phase
induction motors and switched reluctance motors. The
dsPIC33F Motor Control products are also well-suited
for Uninterrupted Power Supply (UPS), inverters,
Switched mode power supplies, power factor correction
and also for controlling the power management module
in servers, telecommunication equipment and other
industrial equipment.
The device names, pin counts, memory sizes and
peripheral availability of each device are listed below.
The following pages show their pinout diagrams.
dsPIC33FJXXXMCX06A/X08A/X10A Controller Families
Quadrature Encoder
Interface
Motor Control PWM
Output Compare
Std. PWM
I/O Pins (Max)
(2)
53
69
85
53
85
53
85
53
69
85
85
85
Codec Interface
Enhanced CAN
Input Capture
Timer 16-bit
Program
Flash
RAM
Pins
Memory (Kbyte)
(1)
(Kbyte)
Packages
PT, MR
PT
PF, PT
PT, MR
PF, PT
PT, MR
PF, PT
PT, MR
PT
PF, PT
PF, PT
PF, PT
UART
Device
dsPIC33FJ64MC506A
dsPIC33FJ64MC508A
dsPIC33FJ64MC510A
dsPIC33FJ64MC706A
dsPIC33FJ64MC710A
dsPIC33FJ128MC506A
dsPIC33FJ128MC510A
dsPIC33FJ128MC706A
dsPIC33FJ128MC708A
dsPIC33FJ128MC710A
dsPIC33FJ256MC510A
dsPIC33FJ256MC710A
Note 1:
2:
64
80
100
64
100
64
100
64
80
100
100
100
64
64
64
64
64
128
128
128
128
128
256
256
8
8
8
16
16
8
8
16
16
16
16
30
9
9
9
9
9
9
9
9
9
9
9
9
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8 ch
8 ch
8 ch
8 ch
8 ch
8 ch
8 ch
8 ch
8 ch
8 ch
8 ch
8 ch
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1 ADC,
16 ch
1 ADC,
18 ch
1 ADC,
24 ch
2 ADC,
16 ch
2 ADC,
24 ch
1 ADC,
16 ch
1 ADC,
24 ch
2 ADC,
16 ch
2 ADC,
18 ch
2 ADC,
24 ch
1 ADC,
24 ch
2 ADC,
24 ch
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
I
2
C™
2
2
2
2
2
2
2
2
2
2
2
2
ADC
SPI
1
1
1
1
2
1
1
1
2
2
1
2
RAM size is inclusive of 2 Kbytes DMA RAM.
Maximum I/O pin count includes pins shared by the peripheral functions.
DS70594D-page 2
2009-2012 Microchip Technology Inc.
Analogue and Mixed Signal
京公网安备 11010802033920号
EEWORLD
