EEWORLDEEWORLDEEWORLD

Part Number

Search

PEEL18CV8ZTI-25

Description
EE PLD, 25ns, PAL-Type, CMOS, PDSO20, 0.170 INCH, TSSOP-20
CategoryProgrammable logic devices    Programmable logic   
File Size181KB,10 Pages
ManufacturerIntegrated Circuit Systems(IDT )
Download Datasheet Parametric Compare View All

PEEL18CV8ZTI-25 Overview

EE PLD, 25ns, PAL-Type, CMOS, PDSO20, 0.170 INCH, TSSOP-20

PEEL18CV8ZTI-25 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP20,.25
Contacts20
Reach Compliance Codeunknown
Is SamacsysN
ArchitecturePAL-TYPE
maximum clock frequency33.3 MHz
JESD-30 codeR-PDSO-G20
JESD-609 codee0
length6.5 mm
Dedicated input times9
Number of I/O lines8
Number of entries18
Output times8
Number of product terms113
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize9 DEDICATED INPUTS, 8 I/O
Output functionMACROCELL
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP20,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
power supply5 V
Programmable logic typeEE PLD
propagation delay25 ns
Certification statusNot Qualified
Maximum seat height1.1 mm
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
width4.4 mm
Base Number Matches1
Commercial
PEEL™ 18CV8Z-25
CMOS Programmable Electrically Erasable Logic Device
Features
s
Ultra Low Power Operation
- Vcc = 5 Volts ±10%
- Icc = 10 µA (typical) at standby
- Icc = 2 mA (typical) at 1 MHz
CMOS Electrically Erasable Technology
- Superior factory testing
-
Reprogrammable in plastic package
-
Reduces retrofit and development costs
Application Versatility
-
Replaces random logic
-
Super set of standard PLDs
-
Pin-to-pin compatible with 16V8
-
Ideal for use in power-sensitive systems
s
s
s
Architectural Flexibility
-
Enhanced architecture fits in more logic
-
113 product terms x 36 input AND array
-
10 inputs and 8 I/O pins
-
12 possible macrocell configurations
-
Asynchronous clear, Synchronous preset
-
Independent output enables
-
Programmable clock; pin 1 or p-term
-
Programmable clock polarity
-
20 Pin DIP/SOIC/TSSOP and PLCC
General Description
The PEEL™18CV8Z is a Programmable Electrically Erasable
Logic (PEEL™) SPLD (Simple Programmable Logic Device)
that features ultra-low, automatic “zero” power-down operation.
The “zero power” (100 µA max. Icc) power-down mode makes
the PEEL™18CV8Z ideal for a broad range of battery-powered
portable equipment applications, from hand-held meters to PCM-
CIA modems. EE-reprogrammability provides both the conve-
nience of fast reprogramming for product development and quick
product personalization in manufacturing, including Engineering
Change Orders.
The PEEL™18CV8Z is logically and functionally similar to
ICT’s 5 Volt PEEL™18CV8 and 3 Volt PEEL™18LV8Z. The
differences between the PEEL™18CV8Z and PEEL™18CV8
include the addition of programmable clock polarity, a product
term clock, and variable width product terms in the AND/OR
Logic Array.
Like the PEEL™18CV8, the PEEL™18CV8Z is logical superset
of the industry standard PAL16V8 SPLD. The PEEL™18CV8Z
provides additional architectural features that allow more logic to
be incorporated into the design. ICT’s JEDEC file translator
allows easy conversion of existing 20 pin PLD designs to the
PEEL™18CV8Z architecture without the need for redesign. The
PEEL™18CV8Z architecture allows it to replace over twenty
standard 20-pin DIP, SOIC, TSSOP and PLCC packages.
Figure 7 Pin Configuration
I/CLK
I
I
I
I
I
I
I
I
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
Figure 8 Block Diagram
CLK MUX (Optional)
DIP
TSSOP
PLCC
SOIC
1 of 10

PEEL18CV8ZTI-25 Related Products

PEEL18CV8ZTI-25 PEEL18CV8ZPI-25 PEEL18CV8ZSI-25 PEEL18CV8ZP-25 0805G821K250ST-030 PEEL18CV8ZT-25 PEEL18CV8ZJ-25 PEEL18CV8ZJI-25
Description EE PLD, 25ns, PAL-Type, CMOS, PDSO20, 0.170 INCH, TSSOP-20 EE PLD, 25ns, PAL-Type, CMOS, PDIP20, 0.300 INCH, PLASTIC, DIP-20 EE PLD, 25ns, PAL-Type, CMOS, PDSO20, 0.300 INCH, SOIC-20 EE PLD, 25ns, PAL-Type, CMOS, PDIP20, 0.300 INCH, PLASTIC, DIP-20 Ceramic Capacitor, Multilayer, Ceramic, 25V, 10% +Tol, 10% -Tol, NP0, -/+30ppm/Cel TC, 0.00082uF, 0805, EE PLD, 25ns, PAL-Type, CMOS, PDSO20, 0.170 INCH, TSSOP-20 EE PLD, 25ns, PAL-Type, CMOS, PQCC20, PLASTIC, LCC-20 EE PLD, 25ns, PAL-Type, CMOS, PQCC20, PLASTIC, LCC-20
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible
package instruction TSSOP, TSSOP20,.25 DIP, DIP20,.3 SOP, SOP20,.4 DIP, DIP20,.3 , 0805 TSSOP, TSSOP20,.25 QCCJ, LDCC20,.4SQ QCCJ, LDCC20,.4SQ
Reach Compliance Code unknown unknown unknown unknown compliant unknown unknown unknown
JESD-609 code e0 e0 e0 e0 e0 e0 e0 e0
length 6.5 mm 26.162 mm 12.8 mm 26.162 mm 2.032 mm 6.5 mm 8.9662 mm 8.9662 mm
Number of terminals 20 20 20 20 2 20 20 20
Maximum operating temperature 85 °C 85 °C 85 °C 70 °C 125 °C 70 °C 70 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C - -55 °C - - -40 °C
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH IN-LINE SMALL OUTLINE IN-LINE SMT SMALL OUTLINE, THIN PROFILE, SHRINK PITCH CHIP CARRIER CHIP CARRIER
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) - with Nickel (Ni) barrier Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
width 4.4 mm 7.62 mm 7.5 mm 7.62 mm 1.27 mm 4.4 mm 8.9662 mm 8.9662 mm
Parts packaging code TSSOP DIP SOIC DIP - TSSOP QLCC QLCC
Contacts 20 20 20 20 - 20 20 20
Is Samacsys N N N N - N N -
Architecture PAL-TYPE PAL-TYPE PAL-TYPE PAL-TYPE - PAL-TYPE PAL-TYPE PAL-TYPE
maximum clock frequency 33.3 MHz 33.3 MHz 33.3 MHz 33.3 MHz - 33.3 MHz 33.3 MHz 33.3 MHz
JESD-30 code R-PDSO-G20 R-PDIP-T20 R-PDSO-G20 R-PDIP-T20 - R-PDSO-G20 S-PQCC-J20 S-PQCC-J20
Dedicated input times 9 9 9 9 - 9 9 9
Number of I/O lines 8 8 8 8 - 8 8 8
Number of entries 18 18 18 18 - 18 18 18
Output times 8 8 8 8 - 8 8 8
Number of product terms 113 113 113 113 - 113 113 113
organize 9 DEDICATED INPUTS, 8 I/O 9 DEDICATED INPUTS, 8 I/O 9 DEDICATED INPUTS, 8 I/O 9 DEDICATED INPUTS, 8 I/O - 9 DEDICATED INPUTS, 8 I/O 9 DEDICATED INPUTS, 8 I/O 9 DEDICATED INPUTS, 8 I/O
Output function MACROCELL MACROCELL MACROCELL MACROCELL - MACROCELL MACROCELL MACROCELL
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP DIP SOP DIP - TSSOP QCCJ QCCJ
Encapsulate equivalent code TSSOP20,.25 DIP20,.3 SOP20,.4 DIP20,.3 - TSSOP20,.25 LDCC20,.4SQ LDCC20,.4SQ
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR - RECTANGULAR SQUARE SQUARE
power supply 5 V 5 V 5 V 5 V - 5 V 5 V 5 V
Programmable logic type EE PLD EE PLD EE PLD EE PLD - EE PLD EE PLD EE PLD
propagation delay 25 ns 25 ns 25 ns 25 ns - 25 ns 25 ns 25 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified - Not Qualified Not Qualified Not Qualified
Maximum seat height 1.1 mm - 2.64 mm - - 1.1 mm 4.369 mm 4.369 mm
Maximum supply voltage 5.5 V 5.5 V 5.5 V 5.25 V - 5.25 V 5.25 V 5.5 V
Minimum supply voltage 4.5 V 4.5 V 4.5 V 4.75 V - 4.75 V 4.75 V 4.5 V
Nominal supply voltage 5 V 5 V 5 V 5 V - 5 V 5 V 5 V
surface mount YES NO YES NO - YES YES YES
technology CMOS CMOS CMOS CMOS - CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL COMMERCIAL - COMMERCIAL COMMERCIAL INDUSTRIAL
Terminal form GULL WING THROUGH-HOLE GULL WING THROUGH-HOLE - GULL WING J BEND J BEND
Terminal pitch 0.65 mm 2.54 mm 1.27 mm 2.54 mm - 0.65 mm 1.27 mm 1.27 mm
Terminal location DUAL DUAL DUAL DUAL - DUAL QUAD QUAD
Base Number Matches 1 1 1 1 - 1 1 -
LeCroy Releases Industry's Most Comprehensive MIPI Test Solution
LeCroy Releases Industry's Most Comprehensive MIPI Test Solution...
安_然 Test/Measurement
Take a look at the $1.95 million Bugatti pool table: it uses a gyroscopic servo leveling system and is as stable as an old dog on the boat
Does it have to be that difficult to play a game of billiards on a boat? You can follow the video below to see this tycoon-level toy It uses a gyro servo drive leveling system. Since each leg of the p...
nmg Motor Drive Control(Motor Control)
DC bias voltage
The DC bias voltage refers to the voltage that should be set between the base and emitter and between the collector and base in the transistor amplifier circuit when the transistor is in the amplifica...
PCB培训 Discrete Device
MCU Countdown Timer
Because the mechanical switch has jitter when it is turned on and off, it is necessary to add a software de-jitter program in the program. Its working principle is as follows: When the microcontroller...
rain MCU
Why does the msp430 clear the oscillator failure flag after starting the vibrator? How to use DCOCTL?
Do I need to clear the oscillator failure flag even if I don't use interrupts? And how do I use DCOCTL? Can you tell me more specifically? ~~~~~~~~ Please give me some advice...
s364147694 Microcontroller MCU
Intouch hardware dog and authorization issues?
When purchasing the Inotuch hardware dongle and authorization file, are the units of use specified? Can the extra hardware dongles or authorization files be used elsewhere? Please help me answer this ...
eeleader-mcu Industrial Control Electronics

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 368  1314  436  2200  579  8  27  9  45  12 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号