IDT70V639S12PRFG8 datasheet, PDF

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IDT70V639S12PRFG8: DescriptionDual-Port SRAM, 128KX18, 12ns, CMOS, PQFP128, TQFP-128; Categorystorage storage; File Size187KB，23 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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IDT70V639S12PRFG8 Overview

Dual-Port SRAM, 128KX18, 12ns, CMOS, PQFP128, TQFP-128

IDT70V639S12PRFG8 Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Parts packaging code	QFP
package instruction	LFQFP,
Contacts	128
Reach Compliance Code	compliant
ECCN code	3A991.B.2.A
Is Samacsys	N
Maximum access time	12 ns
JESD-30 code	R-PQFP-G128
JESD-609 code	e3
length	20 mm
memory density	2359296 bit
Memory IC Type	DUAL-PORT SRAM
memory width	18
Humidity sensitivity level	3
Number of functions	1
Number of terminals	128
word count	131072 words
character code	128000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	128KX18
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Package shape	RECTANGULAR
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum supply voltage (Vsup)	3.45 V
Minimum supply voltage (Vsup)	3.15 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	14 mm
Base Number Matches	1

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HIGH-SPEED 3.3V 128K x 18

ASYNCHRONOUS DUAL-PORT

STATIC RAM

PRELIMINARY

IDT70V639S

Features

True Dual-Port memory cells which allow simultaneous

access of the same memory location

High-speed access

– Commercial: 10/12/15ns (max.)

– Industrial: 12/15ns (max.)

Dual chip enables allow for depth expansion without

external logic

IDT70V639 easily expands data bus width to 36 bits or

more using the Master/Slave select when cascading more

than one device

M/S = V

for

BUSY

output flag on Master,

M/S = V

for

BUSY

input on Slave

Busy and Interrupt Flags

On-chip port arbitration logic

Full on-chip hardware support of semaphore signaling

between ports

Fully asynchronous operation from either port

Separate byte controls for multiplexed bus and bus

matching compatibility

Supports JTAG features compliant to IEEE 1149.1

– Due to limited pin count, JTAG is not supported on the

128-pin TQFP package.

LVTTL-compatible, single 3.3V (±150mV) power supply for

core

LVTTL-compatible, selectable 3.3V (±150mV)/2.5V (±100mV)

power supply for I/Os and control signals on each port

Available in a 128-pin Thin Quad Flatpack, 208-ball fine

pitch Ball Grid Array, and 256-ball Ball Grid Array

Industrial temperature range (–40°C to +85°C) is available

for selected speeds

Functional Block Diagram

R/W

Dout0-8_L

Dout9-17_L

Dout0-8_R

Dout9-17_R

128K x 18

MEMORY

ARRAY

I/O

- I/O

17L

Din_L

Din_R

I/O

- I/O

17R

16L

Address

Decoder

ADDR_L

ADDR_R

Address

Decoder

16R

R/W

BUSY

SEM

INT

ARBITRATION

INTERRUPT

SEMAPHORE

LOGIC

R/W

BUSY

M/S

SEM

INT

TDI

TDO

JTAG

TMS

TCK

TRST

5621 drw 01

NOTES:

BUSY

is an input as a Slave (M/S=V

) and an output when it is a Master (M/S=V

BUSY

and

INT

are non-tri-state totem-pole outputs (push-pull).

JUNE 2001

DSC-5621/3

IDT70V639S12PRFG8 Related Products

	IDT70V639S12PRFG8	IDT70V639S12BFG8	IDT70V639S10BCG8	IDT70V639S15BCG8	IDT70V639S15PRFG8	IDT70V639S10BFG8	IDT70V639S15BFG8	IDT70V639S12PRFGI8	IDT70V639S12BCG8	IDT70V639S12BCGI8
Description	Dual-Port SRAM, 128KX18, 12ns, CMOS, PQFP128, TQFP-128	Dual-Port SRAM, 128KX18, 12ns, CMOS, PBGA208, FINE PITCH, BGA-208	Dual-Port SRAM, 128KX18, 10ns, CMOS, PBGA256, BGA-256	Dual-Port SRAM, 128KX18, 15ns, CMOS, PBGA256, BGA-256	Dual-Port SRAM, 128KX18, 15ns, CMOS, PQFP128, TQFP-128	Dual-Port SRAM, 128KX18, 10ns, CMOS, PBGA208, FINE PITCH, BGA-208	Dual-Port SRAM, 128KX18, 15ns, CMOS, PBGA208, FINE PITCH, BGA-208	Dual-Port SRAM, 128KX18, 12ns, CMOS, PQFP128, TQFP-128	Dual-Port SRAM, 128KX18, 12ns, CMOS, PBGA256, BGA-256	Dual-Port SRAM, 128KX18, 12ns, CMOS, PBGA256, BGA-256
Is it lead-free?	Lead free	Lead free	Lead free	Lead free	Lead free	Lead free	Lead free	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to	conform to	conform to	conform to	conform to
Parts packaging code	QFP	BGA	BGA	BGA	QFP	BGA	BGA	QFP	BGA	BGA
package instruction	LFQFP,	TFBGA,	BGA-256	BGA-256	LFQFP,	TFBGA,	TFBGA,	LFQFP,	BGA-256	BGA-256
Contacts	128	208	256	256	128	208	208	128	256	256
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compliant
ECCN code	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A
Maximum access time	12 ns	12 ns	10 ns	15 ns	15 ns	10 ns	15 ns	12 ns	12 ns	12 ns
JESD-30 code	R-PQFP-G128	S-PBGA-B208	S-PBGA-B256	S-PBGA-B256	R-PQFP-G128	S-PBGA-B208	S-PBGA-B208	R-PQFP-G128	S-PBGA-B256	S-PBGA-B256
JESD-609 code	e3	e1	e1	e1	e3	e1	e1	e3	e1	e1
length	20 mm	15 mm	17 mm	17 mm	20 mm	15 mm	15 mm	20 mm	17 mm	17 mm
memory density	2359296 bit	2359296 bit	2359296 bit	2359296 bit	2359296 bit	2359296 bit	2359296 bit	2359296 bit	2359296 bit	2359296 bit
Memory IC Type	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM
memory width	18	18	18	18	18	18	18	18	18	18
Humidity sensitivity level	3	3	3	3	3	3	3	3	3	3
Number of functions	1	1	1	1	1	1	1	1	1	1
Number of terminals	128	208	256	256	128	208	208	128	256	256
word count	131072 words	131072 words	131072 words	131072 words	131072 words	131072 words	131072 words	131072 words	131072 words	131072 words
character code	128000	128000	128000	128000	128000	128000	128000	128000	128000	128000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	85 °C	70 °C	85 °C
organize	128KX18	128KX18	128KX18	128KX18	128KX18	128KX18	128KX18	128KX18	128KX18	128KX18
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LFQFP	TFBGA	LBGA	LBGA	LFQFP	TFBGA	TFBGA	LFQFP	LBGA	LBGA
Package shape	RECTANGULAR	SQUARE	SQUARE	SQUARE	RECTANGULAR	SQUARE	SQUARE	RECTANGULAR	SQUARE	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE	GRID ARRAY, LOW PROFILE	FLATPACK, LOW PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	FLATPACK, LOW PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE	GRID ARRAY, LOW PROFILE
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	260	260	260	260	260	260	260	260	260	260
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.6 mm	1.2 mm	1.5 mm	1.5 mm	1.6 mm	1.2 mm	1.2 mm	1.6 mm	1.5 mm	1.5 mm
Maximum supply voltage (Vsup)	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V
Minimum supply voltage (Vsup)	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	INDUSTRIAL
Terminal surface	MATTE TIN	Tin/Silver/Copper (Sn/Ag/Cu)	Tin/Silver/Copper (Sn/Ag/Cu)	Tin/Silver/Copper (Sn/Ag/Cu)	MATTE TIN	Tin/Silver/Copper (Sn/Ag/Cu)	Tin/Silver/Copper (Sn/Ag/Cu)	MATTE TIN	Tin/Silver/Copper (Sn/Ag/Cu)	Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form	GULL WING	BALL	BALL	BALL	GULL WING	BALL	BALL	GULL WING	BALL	BALL
Terminal pitch	0.5 mm	0.8 mm	1 mm	1 mm	0.5 mm	0.8 mm	0.8 mm	0.5 mm	1 mm	1 mm
Terminal location	QUAD	BOTTOM	BOTTOM	BOTTOM	QUAD	BOTTOM	BOTTOM	QUAD	BOTTOM	BOTTOM
Maximum time at peak reflow temperature	30	30	30	30	30	30	30	30	30	30
width	14 mm	15 mm	17 mm	17 mm	14 mm	15 mm	15 mm	14 mm	17 mm	17 mm
Base Number Matches	1	1	1	1	1	1	1	1	-	-
Maker	-	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	-	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)

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