MCP2510
Stand-Alone CAN Controller with SPI
™
Interface
Features
• Implements Full CAN V2.0A and V2.0B at 1 Mb/s:
- 0 - 8 byte message length
- Standard and extended data frames
- Programmable bit rate up to 1 Mb/s
- Support for remote frames
- Two receive buffers with prioritized message
storage
- Six full acceptance filters
- Two full acceptance filter masks
- Three transmit buffers with prioritization and
abort features
- Loop-back mode for self test operation
• Hardware Features:
- High Speed SPI Interface
(5 MHz at 4.5V I temp)
- Supports SPI modes 0,0 and 1,1
- Clock out pin with programmable prescaler
- Interrupt output pin with selectable enables
- ‘Buffer full’ output pins configureable as inter-
rupt pins for each receive buffer or as general
purpose digital outputs
- ‘Request to Send’ input pins configureable as
control pins to request immediate message
transmission for each transmit buffer or as
general purpose digital inputs
- Low Power Sleep mode
• Low power CMOS technology:
- Operates from 3.0V to 5.5V
- 5 mA active current typical
- 10 µA standby current typical at 5.5V
• 18-pin PDIP/SOIC and 20-pin TSSOP packages
• Temperature ranges supported:
- Industrial (I):
-40°C to +85°C
- Extended (E):
-40°C to +125°C
Description
The Microchip Technology Inc. MCP2510 is a Full Con-
troller Area Network (CAN) protocol controller imple-
menting CAN specification V2.0 A/B. It supports CAN
1.2, CAN 2.0A, CAN 2.0B Passive, and CAN 2.0B
Active versions of the protocol, and is capable of trans-
mitting and receiving standard and extended mes-
sages. It is also capable of both acceptance filtering
and message management. It includes three transmit
buffers and two receive buffers that reduce the amount
of microcontroller (MCU) management required. The
MCU communication is implemented via an industry
standard Serial Peripheral Interface (SPI) with data
rates up to 5 Mb/s.
Package Types
18 LEAD PDIP/SOIC
TXCAN
RXCAN
CLKOUT
TX0RTS
TX1RTS
TX2RTS
OSC2
OSC1
V
SS
1
2
3
18
17
16
V
DD
RESET
CS
SO
SI
SCK
INT
RX0BF
RX1BF
MCP2510
4
5
6
7
8
9
15
14
13
12
11
10
20 LEAD TSSOP
TXCAN
RXCAN
CLKOUT
TX0RTS
TX1RTS
NC
TX2RTS
OSC2
OSC1
V
SS
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
DD
RESET
CS
SO
SI
NC
SCK
INT
RX0BF
RX1BF
MCP2510
©
2007 Microchip Technology Inc.
DS21291F-page 1
MCP2510
Table of Contents
1.0
Device Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.0
Can Message Frames. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.0
Message Transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.0
Message Reception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.0
Bit Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6.0
Error Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
7.0
Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
8.0
Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
9.0
Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
10.0
Register Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
11.0
SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
12.0
Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
13.0
Packaging Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
On-Line Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Reader Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Product Identification System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Worldwide Sales and Service . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
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You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
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An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for cur-
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DS21291F-page 2
©
2007 Microchip Technology Inc.
MCP2510
1.0
1.1
DEVICE FUNCTIONALITY
Overview
checked for errors and then matched against the user
defined filters to see if it should be moved into one of
the two receive buffers.
The MCU interfaces to the device via the SPI interface.
Writing to and reading from all registers is done using
standard SPI read and write commands.
Interrupt pins are provided to allow greater system flex-
ibility. There is one multi-purpose interrupt pin as well
as specific interrupt pins for each of the receive regis-
ters that can be used to indicate when a valid message
has been received and loaded into one of the receive
buffers. Use of the specific interrupt pins is optional,
and the general purpose interrupt pin as well as status
registers (accessed via the SPI interface) can also be
used to determine when a valid message has been
received.
There are also three pins available to initiate immediate
transmission of a message that has been loaded into
one of the three transmit registers. Use of these pins is
optional and initiating message transmission can also
be done by utilizing control registers accessed via the
SPI interface.
Table 1-1 gives a complete list of all of the pins on the
MCP2510.
The MCP2510 is a stand-alone CAN controller devel-
oped to simplify applications that require interfacing
with a CAN bus. A simple block diagram of the
MCP2510 is shown in Figure 1-1. The device consists
of three main blocks:
1.
2.
3.
The CAN protocol engine.
The control logic and SRAM registers that are
used to configure the device and its operation.
The SPI protocol block.
A typical system implementation using the device is
shown in Figure 1-2.
The CAN protocol engine handles all functions for
receiving and transmitting messages on the bus. Mes-
sages are transmitted by first loading the appropriate
message buffer and control registers. Transmission is
initiated by using control register bits, via the SPI inter-
face, or by using the transmit enable pins. Status and
errors can be checked by reading the appropriate reg-
isters. Any message detected on the CAN bus is
FIGURE 1-1:
RXCAN
BLOCK DIAGRAM
2 RX Buffers
CAN
Protocol
Engine
3 TX
Buffers
6 Acceptance
Filters
Message Assembly
Buffer
SPI
Interface
Logic
CS
SCK
SI
SO
SPI
Bus
TXCAN
Control Logic
INT
RX0BF
RX1BF
TX0RTS
TX1RTS
TX2RTS
©
2007 Microchip Technology Inc.
DS21291F-page 3
MCP2510
FIGURE 1-2:
TYPICAL SYSTEM IMPLEMENTATION
Main
System
Controller
MCP2510
CAN
Transceiver
CAN
BUS
CAN
Transceiver
MCP2510
SPI
INTERFACE
Node
Controller
Node
Controller
Node
Controller
Node
Controller
CAN
Transceiver
MCP2510
CAN
Transceiver
MCP2510
CAN
Transceiver
MCP2510
TABLE 1-1:
Name
TXCAN
RXCAN
CLKOUT
TX0RTS
TX1RTS
TX2RTS
OSC2
OSC1
V
SS
RX1BF
RX0BF
INT
SCK
SI
SO
CS
RESET
V
DD
NC
Note:
PIN DESCRIPTIONS
DIP/
SOIC
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
—
TSSOP
Pin #
1
2
3
4
5
7
8
9
10
11
12
13
14
16
17
18
19
20
6,15
I/O/P
Type
O
I
O
I
I
I
O
I
P
O
O
O
I
I
O
I
I
P
—
Transmit output pin to CAN bus
Receive input pin from CAN bus
Clock output pin with programmable prescaler
Transmit buffer TXB0 request to send or general purpose digital input. 100 kΩ
internal pullup to V
DD
Transmit buffer TXB1 request to send or general purpose digital input. 100 kΩ
internal pullup to V
DD
Transmit buffer TXB2 request to send or general purpose digital input. 100 kΩ
internal pullup to V
DD
Oscillator output
Oscillator input
Ground reference for logic and I/O pins
Receive buffer RXB1 interrupt pin or general purpose digital output
Receive buffer RXB0 interrupt pin or general purpose digital output
Interrupt output pin
Clock input pin for SPI interface
Data input pin for SPI interface
Data output pin for SPI interface
Chip select input pin for SPI interface
Active low device reset input
Positive supply for logic and I/O pins
No internal connection
Description
Type Identification: I=Input; O=Output; P=Power
DS21291F-page 4
©
2007 Microchip Technology Inc.
MCP2510
1.2
Transmit/Receive Buffers
The MCP2510 has three transmit and two receive buffers, two acceptance masks (one for each receive buffer), and a
total of six acceptance filters. Figure 1-3 is a block diagram of these buffers and their connection to the protocol engine.
FIGURE 1-3:
CAN BUFFERS AND PROTOCOL ENGINE BLOCK DIAGRAM
Acceptance Mask
RXM1
Acceptance Filter
RXF2
BUFFERS
Acceptance Mask
RXM0
Acceptance Filter
RXF0
Acceptance Filter
RXF1
TXB0
MESSAGE
TXREQ
ABTF
MLOA
TXERR
TXB1
MESSAGE
TXREQ
ABTF
MLOA
TXERR
TXB2
MESSAGE
TXREQ
ABTF
MLOA
TXERR
A
c
c
e
p
t
Acceptance Filter
RXF3
Acceptance Filter
RXF4
Acceptance Filter
RXF5
A
c
c
e
p
t
Message
Queue
Control
R
X
B
0
Transmit Byte Sequencer
Identifier
M
A
B
Identifier
R
X
B
1
Data Field
Data Field
PROTOCOL
ENGINE
Transmit<7:0>
Shift<14:0>
{Transmit<5:0>, Receive<8:0>}
Comparator
Receive<7:0>
Receive
Error
Counter
Transmit
Error
Counter
REC
TEC
ErrPas
BusOff
CRC<14:0>
Protocol
Finite
State
Machine
Transmit
Logic
Bit
Timing
Logic
Clock
Generator
TX
RX
Configuration
Registers
©
2007 Microchip Technology Inc.
DS21291F-page 5
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