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FEATURES
Complete 12-Bit DAC
No External Components
Single +3 Volt Operation
0.5 mV/Bit with 2.0475 V Full Scale
6 s Output Voltage Settling Time
Low Power: 3.6 mW
Compact SO-8 1.5 mm Height Package
APPLICATIONS
Portable Communications
Digitally Controlled Calibration
Servo Controls
PC Peripherals
CLR
LD
CS
CLK
SDI
+3 Volt, Serial Input
Complete 12-Bit DAC
AD8300
FUNCTIONAL BLOCK DIAGRAM
12-BIT
DAC
12
DAC
REGISTER
12
EN
SERIAL
REGISTER
V
DD
REF
V
OUT
GND
AD8300
GENERAL DESCRIPTION
The AD8300 is a complete 12-bit, voltage-output digital-to-
analog converter designed to operate from a single +3 volt sup-
ply. Built using a CBCMOS process, this monolithic DAC
offers the user low cost, and ease-of-use in single-supply +3 volt
systems. Operation is guaranteed over the supply voltage range
of +2.7 V to +5.5 V making this device ideal for battery oper-
ated applications.
The 2.0475 V full-scale voltage output is laser trimmed to
maintain accuracy over the operating temperature range of the
device. The binary input data format provides an easy-to-use
one-half-millivolt-per-bit software programmability. The voltage
outputs are capable of sourcing 5 mA.
3.0
MINIMUM SUPPLY VOLTAGE – Volts
A double buffered serial data interface offers high speed, three-
wire, DSP and microcontroller compatible inputs using data in
(SDI), clock (CLK) and load strobe (LD) pins. A chip select
(CS) pin simplifies connection of multiple DAC packages by
enabling the clock input when active low. Additionally, a
CLR
input sets the output to zero scale at power on or upon user
demand.
The AD8300 is specified over the extended industrial (–40°C to
+85°C) temperature range. AD8300s are available in plastic
DIP, and low profile 1.5 mm height SO-8 surface mount packages.
1.00
2.8
INL LINEARITY ERROR – LSB
VFS 1 LSB
DATA = FFF
H
T
A
= +25 C
0.75
0.50
0.25
0.00
–0.25
–0.50
–0.75
V
DD
= +2.7V
T
A
= –40 C, +25 C, +125 C
2.6
PROPER OPERATION
WHEN V
DD
SUPPLY
VOLTAGE ABOVE
CURVE
2.4
2.2
2.0
0.01
= –40 C
= +25 C
= +125 C
0
1024
2048
3072
DIGITAL INPUT CODE – Decimal
4096
0.1
1.0
OUTPUT LOAD CURRENT – mA
10
–1.00
Figure 1. Minimum Supply Voltage vs. Load
Figure 2. Linearity Error vs. Digital Code and Temperature
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999
AD8300–SPECIFICATIONS
+3 V OPERATION
(@ V
Parameter
STATIC PERFORMANCE
Resolution
Relative Accuracy
Differential Nonlinearity
2
Zero-Scale Error
Full-Scale Voltage
3
Full-Scale Tempco
ANALOG OUTPUT
Output Current (Source)
Output Current (Sink)
Load Regulation
Output Resistance to GND
Capacitive Load
LOGIC INPUTS
Logic Input Low Voltage
Logic Input High Voltage
Input Leakage Current
Input Capacitance
INTERFACE TIMING
SPECIFICATIONS
4, 5
Clock Width High
Clock Width Low
Load Pulsewidth
Data Setup
Data Hold
Clear Pulsewidth
Load Setup
Load Hold
Select
Deselect
AC CHARACTERISTICS
4
Voltage Output Settling Time
Output Slew Rate
DAC Glitch
Digital Feedthrough
SUPPLY CHARACTERISTICS
Power Supply Range
Positive Supply Current
Power Dissipation
Power Supply Sensitivity
DD
= +5 V
10%, –40 C
≤
T
A
≤
+85 C, unless otherwise noted)
Condition
[Note 1]
Monotonic
Data = 000
H
Data = FFF
H
[Notes 3, 4]
Data = 800
H
,
∆V
OUT
= 5 LSB
Data = 800
H
,
∆V
OUT
= 5 LSB
R
L
= 200
Ω
to
∞,
Data = 800
H
Data = 000
H
No Oscillation
4
Min
12
–2
–1
Typ
Max
Units
Bits
LSB
LSB
mV
Volts
ppm/°C
mA
mA
LSB
Ω
pF
V
V
µA
pF
Symbol
N
INL
DNL
V
ZSE
V
FS
TCV
FS
I
OUT
I
OUT
L
REG
R
OUT
C
L
V
IL
V
IH
I
IL
C
IL
±
1/2
±
1/2
+1/2
2.039 2.0475
16
+2
+1
+3
2.056
1.5
30
500
5
2
5
0.6
2.1
10
10
t
CH
t
CL
t
LDW
t
DS
t
DH
t
CLRW
t
LD1
t
LD2
t
CSS
t
CSH
t
S
SR
To
±
0.2% of Full Scale
To
±
1 LSB of Final Value
6
Data = 000
H
to FFF
H
to 000
H
40
40
50
15
15
40
15
40
40
40
7
14
2.0
15
15
2.7
1.2
1.9
3.6
0.001
5.5
1.7
3.0
5.1
0.005
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
V/µs
nV/s
nV/s
V
mA
mA
mW
%/%
V
DD RANGE
I
DD
P
DISS
PSS
DNL <
±
1 LSB
V
DD
= 3 V, V
IL
= 0 V, Data = 000
H
V
DD
= 3.6 V, V
IH
= 2.3 V, Data = FFF
H
V
DD
= 3 V, V
IL
= 0 V, Data = 000
H
∆V
DD
=
±
5%
NOTES
1
LSB = 0.5 mV for 0 V to +2.0475 V output range.
2
The first two codes (000
H
, 001
H
) are excluded from the linearity error measurement.
3
Includes internal voltage reference error.
4
These parameters are guaranteed by design and not subject to production testing.
5
All input control signals are specified with t
R
= t
F
= 2 ns (10% to 90% of +3 V) and timed from a voltage level of 1.6 V.
6
The settling time specification does not apply for negative going transitions within the last 6 LSBs of ground. Some devices exhibit double the typical settling time in
this 6 LSB region.
Specifications subject to change without notice.
–2–
REV. A
AD8300
+5 V OPERATION
Parameter
STATIC PERFORMANCE
Resolution
Relative Accuracy
Differential Nonlinearity
2
Zero-Scale Error
Full-Scale Voltage
3
Full-Scale Tempco
ANALOG OUTPUT
Output Current (Source)
Output Current (Sink)
Load Regulation
Output Resistance to GND
Capacitive Load
LOGIC INPUTS
Logic Input Low Voltage
Logic Input High Voltage
Input Leakage Current
Input Capacitance
INTERFACE TIMING
SPECIFICATIONS
4, 5
Clock Width High
Clock Width Low
Load Pulsewidth
Data Setup
Data Hold
Clear Pulsewidth
Load Setup
Load Hold
Select
Deselect
AC CHARACTERISTICS
4
Voltage Output Settling Time
Output Slew Rate
DAC Glitch
Digital Feedthrough
SUPPLY CHARACTERISTICS
Power Supply Range
Positive Supply Current
Power Dissipation
Power Supply Sensitivity
(@ V
DD
= +5 V
10%, –40 C
≤
T
A
≤
+85 C, unless otherwise noted)
Condition
[Note 1]
Monotonic
Data = 000
H
Data = FFF
H
[Notes 3, 4]
Data = 800
H
,
∆V
OUT
= 5 LSB
Data = 800
H
,
∆V
OUT
= 5 LSB
R
L
= 200
Ω
to
∞,
Data = 800
H
Data = 000
H
No Oscillation
4
Min
12
–2
–1
Typ
Max
Units
Bits
LSB
LSB
mV
Volts
ppm/°C
mA
mA
LSB
Ω
pF
V
V
µA
pF
Symbol
N
INL
DNL
V
ZSE
V
FS
TCV
FS
I
OUT
I
OUT
L
REG
R
OUT
C
L
V
IL
V
IH
I
IL
C
IL
±
1/2
±
1/2
+1/2
2.039 2.0475
16
+2
+1
+3
2.056
1.5
30
500
5
2
5
0.8
2.4
10
10
t
CH
t
CL
t
LDW
t
DS
t
DH
t
CLWR
t
LD1
t
LD2
t
CSS
t
CSH
t
S
SR
To
±
0.2% of Full Scale
To
±
1 LSB of Final Value
6
Data = 000
H
to FFF
H
to 000
H
30
30
30
15
15
30
15
30
30
30
6
13
2.2
15
15
2.7
1.2
2.8
6
0.001
5.5
1.7
4.0
5.1
0.006
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
V/µs
nV/s
nV/s
V
mA
mA
mW
%/%
V
DD RANGE
I
DD
P
DISS
PSS
DNL <
±
1 LSB
V
DD
= 5 V, V
IL
= 0 V, Data = 000
H
V
DD
= 5.5 V, V
IH
= 2.3 V, Data = FFF
H
V
DD
= 5 V, V
IL
= 0 V, Data = 000
H
∆V
DD
=
±
10%
NOTES
1
1 LSB = 0.5 mV for 0 V to +2.0475 V output range.
2
The first two codes (000
H
, 001
H
) are excluded from the linearity error measurement.
3
Includes internal voltage reference error.
4
These parameters are guaranteed by design and not subject to production testing.
5
All input control signals are specified with t
R
= t
F
= 2 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V.
6
The settling time specification does not apply for negative going transitions within the last 6 LSBs of ground. Some devices exhibit double the typical settling time in
this 6 LSB region.
Specifications subject to change without notice.
REV. A
–3–
AD8300
ABSOLUTE MAXIMUM RATINGS
*
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +7 V
Logic Inputs to GND . . . . . . . . . . . . . . . . . . . . . –0.3 V, +7 V
V
OUT
to GND . . . . . . . . . . . . . . . . . . . . . . –0.3 V, V
DD
+ 0.3 V
I
OUT
Short Circuit to GND . . . . . . . . . . . . . . . . . . . . . . 50 mA
Package Power Dissipation . . . . . . . . . . . . . (T
J
Max – T
A
)/θ
JA
Thermal Resistance
θ
JA
8-Lead Plastic DIP Package (N-8) . . . . . . . . . . . . . 103°C/W
8-Lead SOIC Package (SO-8) . . . . . . . . . . . . . . . . 158°C/W
Maximum Junction Temperature (T
J
Max) . . . . . . . . . . 150°C
Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . . +300°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
PIN CONFIGURATIONS
SO-8
Plastic DIP
1
4
8
5
V
DD
1
CS
2
8 V
OUT
AD8300
7 GND
(Not to Scale)
CLK 3 TOP VIEW 6
CLR
SDI 4
5
LD
PIN DESCRIPTIONS
Pin #
1
2
Name
V
DD
CS
Function
Positive power supply input. Specified range
of operation +2.7 V to +5.5 V.
Chip Select, active low input. Disables shift
register loading when high. Does not affect
LD
operation.
Clock input, positive edge clocks data into
shift register.
Serial Data Input, input data loads directly
into the shift register, MSB first.
Load DAC register strobes, active low.
Transfers shift register data to DAC register.
See Truth Table I for operation. Asynchro-
nous active low input.
Resets DAC register to zero condition.
Asynchronous active low input.
Analog and Digital Ground.
DAC voltage output, 2.0475 V full scale
with 0.5 mV per bit. An internal tempera-
ture stabilized reference maintains a fixed
full-scale voltage independent of time, tem-
perature and power supply variations.
D2
D1
D0
3
4
CLK
SDI
LD
ORDERING GUIDE
5
Package
Options
N-8
SO-8
6
7
8
Model
AD8300AN
AD8300AR
INL
±
2
±
2
Temp
XIND
XIND
Package
Description
8-Lead P-DIP
8-Lead SOIC
CLR
GND
V
OUT
NOTES
XIND = –40°C to +85°C.
The AD8300 contains 630 transistors. The die size measures 72 mil
×
65 mil.
SDI
CLK
D11
D10
D9
D8
D7
D6
D5
D4
D3
t
CSS
t
CSH
t
LD2
CS
t
LD1
LD
SDI
t
DS
t
DH
t
CH
CLK
LD
CLR
FS
t
CL
t
LDW
t
CLRW
t
S
t
S
1LSB
ERROR BAND
V
OUT
ZS
Figure 3. Timing Diagram
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8300 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. A
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