IMPORTANT NOTICE
Dear customer,
As from August 2
nd
2008, the wireless operations of NXP have moved to a new company,
ST-NXP Wireless.
As a result, the following changes are applicable to the attached document.
●
Company name - NXP B.V.
is replaced with
ST-NXP Wireless.
Copyright
- the copyright notice at the bottom of each page “© NXP B.V. 200x. All
rights reserved”, shall now read: “© ST-NXP Wireless 200x - All rights reserved”.
Web site
-
http://www.nxp.com
is replaced with
http://www.stnwireless.com
Contact information
- the list of sales offices previously obtained by sending
an email to
salesaddresses@nxp.com
, is now found at
http://www.stnwireless.com
under Contacts.
●
●
●
If you have any questions related to the document, please contact our nearest sales office.
Thank you for your cooperation and understanding.
ST-NXP Wireless
www.stnwireless.com
ISP1564
Hi-Speed USB PCI host controller
Rev. 02 — 13 November 2008
Product data sheet
1. General description
The ISP1564 is a Peripheral Component Interconnect (PCI)-based, single-chip Universal
Serial Bus (USB) host controller. It integrates one Original USB Open Host Controller
Interface (OHCI) core, one Hi-Speed USB Enhanced Host Controller Interface (EHCI)
core, and two transceivers that are compliant with Hi-Speed USB and Original USB. The
functional parts of the ISP1564 are fully compliant with
Universal Serial Bus Specification
Rev. 2.0, Open Host Controller Interface Specification for USB Rev. 1.0a, Enhanced Host
Controller Interface Specification for Universal Serial Bus Rev. 1.0, PCI Local Bus
Specification Rev. 2.2,
and
PCI Bus Power Management Interface Specification Rev. 1.1.
The ISP1564 is pin-to-pin and function compatible with the NXP ISP1562, subject to the
structure of the software.
Integrated high performance USB transceivers allow the ISP1564 to handle all Hi-Speed
USB transfer speed modes: high-speed (480 Mbit/s), full-speed (12 Mbit/s) and low-speed
(1.5 Mbit/s). The ISP1564 provides two downstream ports, allowing simultaneous
connection of USB devices at different speeds.
The ISP1564 is fully compatible with various operating system drivers, such as Microsoft
Windows standard OHCI and EHCI drivers that are present in Windows XP,
Windows 2000 and Red Hat Linux.
The ISP1564 directly interfaces to any 32-bit, 33 MHz PCI bus. Its PCI pins can source
3.3 V.
The ISP1564 is ideally suited for use in Hi-Speed USB mobile applications and embedded
solutions.
2. Features
I
Complies with
Universal Serial Bus Specification Rev. 2.0
I
Complies with
PCI Local Bus Specification Rev. 2.2
I
Supports data transfer at high-speed (480 Mbit/s), full-speed (12 Mbit/s) and
low-speed (1.5 Mbit/s)
I
One Original USB OHCI core is compliant with
Open Host Controller Interface
Specification for USB Rev. 1.0a
I
One Hi-Speed USB EHCI core is compliant with
Enhanced Host Controller Interface
Specification for Universal Serial Bus Rev. 1.0
NXP Semiconductors
ISP1564
HS USB PCI host controller
I
Supports PCI 32-bit, 33 MHz interface compliant with
PCI Local Bus Specification
Rev. 2.2,
with support for D3
cold
standby and wake-up modes; all I/O pins are 3.3 V
standard
I
Compliant with
PCI Bus Power Management Interface Specification Rev. 1.1
for all
hosts (EHCI and OHCI), and supports all power states: D0, D1, D2, D3
hot
and D3
cold
I
CLKRUN support for mobile applications, such as internal notebook design
I
Configurable subsystem ID and subsystem vendor ID through external EEPROM
I
External EEPROM can be programmed using the external PCI interface; refer to
Appendix I of
PCI Local Bus Specification Rev. 2.2
I
Digital and analog power separation for better ElectroMagnetic Interference (EMI) and
ElectroStatic Discharge (ESD) protection
I
Supports hot Plug and Play and remote wake-up of peripherals
I
Supports individual power switching and individual overcurrent protection for
downstream ports
I
Supports partial dynamic port-routing capability for downstream ports that allows
sharing of the same physical downstream ports between the Original USB host
controller and the Hi-Speed USB host controller
I
Uses 12 MHz crystal oscillator to reduce system cost and EMI emissions
I
Supports dual power supply: PCI V
aux(3V3)
and V
CC
I
Operates at +3.3 V power supply input
I
Low power consumption
I
Full industrial operating temperature range from
−40 °C
to +85
°C
I
Available in LQFP100 and TFBGA100 packages
3. Applications
I
Digital consumer appliances:
N
Portable consumer
N
Home entertainment
I
Notebook
I
PCI add-on card
I
PC motherboard
4. Ordering information
Table 1.
Ordering information
Package
Name
ISP1564HL
ISP1564ET
LQFP100
TFBGA100
Description
plastic low profile quad flat package; 100 leads;
body 14
×
14
×
1.4 mm
plastic thin fine-pitch ball grid array package; 100 balls;
body 9
×
9
×
0.7 mm
Pitch
0.5 mm
0.8 mm
Version
SOT407-1
SOT926-1
Type number
ISP1564_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 13 November 2008
2 of 98
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Product data sheet
Rev. 02 — 13 November 2008
© NXP B.V. 2008. All rights reserved.
ISP1564_2
5. Block diagram
NXP Semiconductors
SCL
PME#
CLK
32
SDA
97
77, 98, 100
V
CC(IO)AUX
99
7
10, 12 to 15, 20 to 22,
26 to 31, 33, 34,
50 to 54, 56, 57,
59, 62, 63, 65 to 70
23, 35, 48, 60
96
GLOBAL CONTROL
AD[31:0]
PCI CORE
C/BE[3:0]#
REQ#
GNT#
IDSEL
32-bit, 33 MHz PCI bus
INTA#
FRAME#
DEVSEL#
IRDY#
CLKRUN#
PAR
PERR#
SERR#
TRDY#
STOP#
RST#
V
CC(IO)
V
CC(REG)
REG(1V8)
VOLTAGE
REGULATOR
(V
aux
)
3
V
CC(AUX)
9
8
24
4
36
39
37
42
47
44
45
38
41
5
11, 25, 40,
55, 71
16
18, 43, 58
POR
PCI MASTER
ISP1564
V
aux(1V8)
core
2, 73
AUX(1V8)
PCI SLAVE
CONFIGURATION SPACE
CONFIGURATION FUNCTION 0
CONFIGURATION FUNCTION 2
OHCI
(FUNCTION 0)
RAM
EHCI
(FUNCTION 2)
RAM
81
RREF
80
GND
_RREF
CORE
RESET_N
PORT ROUTER
1, 17, 46,
61, 72, 82,
84, 89, 91
GNDA
ATX1
VOLTAGE
REGULATOR
V
CC(I/O)
DETECT
V
CC
CORE
ORIGINAL
USB ATX
Hi-SPEED
USB ATX
ATX2
ORIGINAL
USB ATX
Hi-SPEED
USB ATX
19, 32, 49,
64, 76, 94, 95
GND
HS USB PCI host controller
6
XTAL1
XTAL2
74
75
XOSC
PLL
86, 93
V
CCA(AUX)
78
79
83
85
87
88
90
92
DP2
004aaa790
SYS_TUNE
ISP1564
OC1_N PWE1_N DM1
DP1 OC2_N PWE2_N DM2
Remark:
The figure shows the LQFP pinout. For the TFBGA ballout, see
Table 2.
3 of 98
Fig 1.
Block diagram
NXP Semiconductors
ISP1564
HS USB PCI host controller
6. Pinning information
6.1 Pinning
100 V
CC(IO)AUX
80 GND_RREF
98 V
CC(IO)AUX
77 V
CC(IO)AUX
93 V
CCA(AUX)
86 V
CCA(AUX)
85 DP1
88 PWE2_N
79 PWE1_N
87 OC2_N
78 OC1_N
91 GNDA
89 GNDA
84 GNDA
82 GNDA
99 PME#
81 RREF
95 GND
94 GND
GNDA
AUX(1V8)
V
CC(AUX)
INTA#
RST#
SYS_TUNE
CLK
GNT#
REQ#
1
2
3
4
5
6
7
8
9
76 GND
90 DM2
83 DM1
97 SDA
96 SCL
92 DP2
75 XTAL2
74 XTAL1
73 AUX(1V8)
72 GNDA
71 V
CC(IO)
70 AD[0]
69 AD[1]
68 AD[2]
67 AD[3]
66 AD[4]
65 AD[5]
64 GND
AD[31] 10
V
CC(IO)
11
AD[30] 12
AD[29] 13
AD[28] 14
AD[27] 15
V
CC(REG)
16
GNDA 17
REG(1V8) 18
GND 19
AD[26] 20
AD[25] 21
AD[24] 22
C/BE[3]# 23
IDSEL 24
V
CC(IO)
25
AD[23] 26
AD[22] 27
AD[21] 28
AD[20] 29
AD[19] 30
AD[18] 31
GND 32
AD[17] 33
AD[16] 34
C/BE[2]# 35
FRAME# 36
IRDY# 37
TRDY# 38
DEVSEL# 39
V
CC(IO)
40
STOP# 41
CLKRUN# 42
REG(1V8) 43
PERR# 44
SERR# 45
GNDA 46
PAR 47
C/BE[1]# 48
GND 49
AD[15] 50
ISP1564HL
63 AD[6]
62 AD[7]
61 GNDA
60 C/BE[0]#
59 AD[8]
58 REG(1V8)
57 AD[9]
56 AD[10]
55 V
CC(IO)
54 AD[11]
53 AD[12]
52 AD[13]
51 AD[14]
004aaa791
Fig 2.
Pin configuration LQFP100 (top view)
ISP1564_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 13 November 2008
4 of 98