MC74LVX157
Quad 2-Channel Multiplexer
With 5 V−Tolerant Inputs
The MC74LVX157 is an advanced high speed CMOS quad
2−channel multiplexer. The inputs tolerate voltages up to 7.0 V,
allowing the interface of 5.0 V systems to 3.0 V systems.
It consists of four 2−input digital multiplexers with common select
(S) and enable (E) inputs. When E is held High, selection of data is
inhibited and all the outputs go Low.
The select decoding determines whether the I0 n or I1 n inputs get
routed to the corresponding Z n outputs.
Features
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SOIC−16
D SUFFIX
CASE 751B
TSSOP−16
DT SUFFIX
CASE 948F
•
•
•
•
•
•
•
•
High Speed: t
PD
= 5.1 ns (Typ) at V
CC
= 3.3 V
Low Power Dissipation: I
CC
= 4
mA
(Max) at T
A
= 25°C
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Low Noise: V
OLP
= 0.5 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
•
These Devices are Pb−Free and are RoHS Compliant
PIN NAMES
PIN ASSIGNMENT
V
CC
16
E
15
I0c
14
I1c
13
Zc
12
I0d
11
I1d
10
Zd
9
1
S
2
I0a
3
I1a
4
Za
5
I0b
6
I1b
7
8
Zb GND
16−Lead
(Top View)
MARKING DIAGRAMS
16
Pins
I0n
I1n
E
S
Zn
Function
Source 0 Data Inputs
Source 1 Data Inputs
Enable Input
Select Input
Outputs
16
LVX157G
AWLYWW
1
SOIC−16
1
TSSOP−16
LVX
157
ALYWG
G
TRUTH TABLE
INPUTS
E
H
L
L
L
L
S
X
H
H
L
L
I0n
X
X
X
L
H
I1n
X
L
H
X
X
OUTPUT
Zn
L
L
H
L
H
LVX157
A
WL, L
Y
WW, W
G or
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
H = High Voltage Level; L = Low Voltage Level; X = High or Low
Voltage Level ; For I
CC
Reasons DO NOT FLOAT Inputs
©
Semiconductor Components Industries, LLC, 2014
1
August, 2014 − Rev. 4
Publication Order Number:
MC74LVX157/D
MC74LVX157
S
E
I0a
I1a
I0b
I1b
I0c
I1c
I0d
I1d
1
15
2
3
4
Za
5
6
7
Zb
14
13
12
Zc
11
10
9
Zd
Figure 1. Logic Diagram
MAXIMUM RATINGS
Symbol
V
CC
V
in
V
out
I
IK
I
OK
I
out
I
CC
P
D
T
stg
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current, per Pin
DC Supply Current, V
CC
and GND Pins
Power Dissipation
Storage Temperature
Parameter
Value
–0.5 to +7.0
–0.5 to +7.0
–0.5 to V
CC
+0.5
−20
±20
±25
±50
180
–65 to +150
Unit
V
V
V
mA
mA
mA
mA
mW
_C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
in
V
out
T
A
Dt/DV
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Operating Temperature, All Package Types
Input Rise and Fall Time
Parameter
Min
2.0
0
0
−40
0
Max
3.6
5.5
V
CC
+85
100
Unit
V
V
V
_C
ns/V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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2
MC74LVX157
DC ELECTRICAL CHARACTERISTICS
V
CC
V
2.0
3.0
3.6
2.0
3.0
3.6
I
OH
= −50mA
I
OH
= −50mA
I
OH
= −4mA
I
OL
= 50mA
I
OL
= 50mA
I
OL
= 4mA
V
in
= 5.5V or GND
V
in
= V
CC
or GND
2.0
3.0
3.0
2.0
3.0
3.0
3.6
3.6
T
A
= 25°C
Min
1.5
2.0
2.4
−
−
−
1.9
2.9
2.58
−
−
−
−
−
Typ
−
−
−
−
−
−
2.0
3.0
0.0
0.0
−
−
−
Max
−
−
−
0.5
0.8
0.8
−
−
−
0.1
0.1
0.36
±0.1
4.0
T
A
= −40 to 85°C
Min
1.5
2.0
2.4
−
−
−
1.9
2.9
2.48
−
−
−
−
−
Max
−
−
−
0.5
0.8
0.8
−
−
−
0.1
0.1
0.44
±1.0
40.0
Unit
V
Symbol
V
IH
Parameter
High−Level Input Voltage
Test Conditions
V
IL
Low−Level Input Voltage
V
V
OH
High−Level Output Voltage
(V
in
= V
IH
or V
IL
)
Low−Level Output Voltage
(V
in
= V
IH
or V
IL
)
Input Leakage Current
Quiescent Supply Current
V
V
OL
V
I
in
I
CC
mA
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î
Î
Î
ÎÎÎ Î Î Î Î Î
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î
Î
Î
ÎÎÎ Î Î Î Î Î
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î
Î
Î
ÎÎÎ Î Î Î Î Î
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ Î Î Î Î Î
Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î
Î
Î
Î Î Î Î Î Î
ÎÎÎ Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3.0ns)
Symbol
t
PLH
,
t
PHL
Parameter
T
A
= 25°C
Typ
6.6
9.1
5.1
7.6
T
A
= −40 to 85°C
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
−
−
Max
15.5
19.0
Test Conditions
Min
−
−
−
−
−
−
−
−
−
−
−
−
−
−
Max
Unit
ns
Propagation Delay, Input to
Output
V
CC
= 2.7V
C
L
= 15pF
C
L
= 50pF
C
L
= 15pF
C
L
= 50pF
12.5
16.0
7.9
11.4
V
CC
= 3.3
±
0.3V
V
CC
= 2.7V
9.5
13.0
t
PLH
,
t
PHL
Propagation Delay, S to Zn
C
L
= 15pF
C
L
= 50pF
C
L
= 15pF
C
L
= 50pF
8.9
11.4
7.0
9.5
16.9
20.4
20.5
24.0
13.0
16.5
20.5
24.0
13.5
17.0
1.5
1.5
ns
V
CC
= 3.3
±
0.3V
V
CC
= 2.7V
11.0
14.5
t
PLH
,
t
PHL
Propagation Delay, E to Zn
C
L
= 15pF
C
L
= 50pF
C
L
= 15pF
C
L
= 50pF
9.1
11.6
7.2
9.7
−
−
17.6
21.1
ns
V
CC
= 3.3
±
0.3V
V
CC
= 2.7V
V
CC
= 3.3
±
0.3V
11.5
15.0
1.5
1.5
t
OSHL
t
OSLH
Output−to−Output Skew (Note 1)
C
L
= 50pF
C
L
= 50pF
ns
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t
OSHL
) or LOW−to−HIGH (t
OSLH
); parameter
guaranteed by design.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î
Î
Î Î Î Î Î Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î Î Î Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
CAPACITIVE CHARACTERISTICS
T
A
= 25°C
Typ
4
T
A
= −40 to 85°C
Min
−
−
Max
10
−
Symbol
Cin
Parameter
Min
−
−
Max
10
−
Unit
pF
pF
Input Capacitance
C
PD
Power Dissipation Capacitance (Note 2)
20
2. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
/ 4 (per bit). C
PD
is used to determine the no−load
dynamic power consumption; P
D
= C
PD
V
CC2
f
in
+ I
CC
V
CC
.
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3
MC74LVX157
NOISE CHARACTERISTICS
(Input t
r
= t
f
= 3.0ns, C
L
= 50pF, V
CC
= 3.3V, Measured in SOIC Package)
T
A
= 25°C
Symbol
V
OLP
V
OLV
V
IHD
V
ILD
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
Characteristic
Typ
0.3
−0.3
−
−
Max
0.5
−0.5
2.0
0.8
Unit
V
V
V
V
V
CC
In or S
t
PLH
Zn
50% V
CC
50%
t
PHL
Zn
E
GND
t
PHL
50% V
CC
50%
t
PLH
V
CC
GND
Figure 2.
Figure 3.
TEST POINT
OUTPUT
DEVICE
UNDER
TEST
C
L
*
*Includes all probe and jig capacitance
Figure 4. Propagation Delay Test Circuit
ORDERING INFORMATION
Device
MC74LVX157DR2G
MC74LVX157DTR2G
Package
SOIC−16
(Pb−Free)
TSSOP−16
(Pb−Free)
Shipping
†
2500 Tape & Reel
2500 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
MC74LVX157
PACKAGE DIMENSIONS
TSSOP−16
CASE 948F
ISSUE B
16X
K
REF
0.10 (0.004)
0.15 (0.006) T U
S
M
T U
S
V
S
K
K1
2X
L/2
16
9
J1
B
−U−
SECTION N−N
L
PIN 1
IDENT.
1
8
J
N
0.25 (0.010)
M
0.15 (0.006) T U
S
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
−−−
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.18
0.28
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0
_
8
_
INCHES
MIN
MAX
0.193 0.200
0.169 0.177
−−− 0.047
0.002 0.006
0.020 0.030
0.026 BSC
0.007
0.011
0.004 0.008
0.004 0.006
0.007 0.012
0.007 0.010
0.252 BSC
0
_
8
_
A
−V−
N
F
DETAIL E
−W−
C
0.10 (0.004)
−T−
SEATING
PLANE
H
D
G
DETAIL E
SOLDERING FOOTPRINT*
7.06
1
16X
0.36
16X
1.26
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
ÉÉÉ
ÇÇÇ
ÉÉÉ
ÇÇÇ
0.65
PITCH
DIMENSIONS: MILLIMETERS
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