ADVANCE INFORMATION
PE4124
Product Description
The PE4124 is a high linearity, passive MOSFET Quad
Mixer for GSM800 & Cellular Base Station Receivers and
exhibits high dynamic range performance over an LO
drive range of 14 dBm to 20 dBm. This mixer integrates
passive matching networks to provide single ended
interfaces for the RF and LO ports, eliminating the need
for external RF baluns or matching networks. The
PE4124 is optimized for frequency down conversion
using low-side LO injection for GSM800 & Cellular Base
Station applications.
The PE4124 is manufactured in Peregrine’s patented
Ultra Thin Silicon (UTSi®) CMOS process, offering the
performance of GaAs with the economy and integration
of conventional CMOS.
Figure 1. Functional Schematic Diagram
LO
High Linearity MOSFET Quad
Mixer For GSM800 & Cellular
BTS
Features
•
Integrated, Single Ended RF &
LO Interfaces
•
High linearity: IIP3>+30 dBm,
820
−
920 MHz (+17 dBm LO)
•
Low conversion loss: 6.4 dB
(+17 dBm LO)
•
High Isolation: Typical LO-IF at
43 dB, LO-RF at 33 dB
•
Designed for Low-Side LO
Injection
Figure 2. Package Drawing
3.10
2.90
RF
PE4124
IF
8-lead TSSOP
6.50
6.25
Table 1. Electrical Specifications @ +25 °C
(Z
S
= Z
L
= 50
Ω)
Parameter
Frequency Range:
LO
RF
IF
Conversion Loss
Isolation:
LO-RF
LO-IF
Input IP3
Input 1 dB Compression
Minimum
750
820
--
Typical
--
--
70*
6.4
33
43
30
20
Maximum
850
920
--
Units
MHz
MHz
MHz
dB
dB
dB
dBm
dBm
*An IF frequency of 70 MHz is a nominal frequency. The IF frequency can be specified by the user as long as the RF and LO frequencies are within the specified maximum
and minimum.
Test conditions unless otherwise noted: LO input drive = 17 dBm
PEREGRINE SEMICONDUCTOR CORP.
|
http://www.peregrine-semi.com
Copyright
Peregrine Semiconductor Corp. 2001
Page 1 of 6
PE4124
Advance Information
Figure 3. Pin Configuration
1
LO
GND
8
Electrostatic Discharge (ESD) Precautions
When handling this UTSi device, observe the same
precautions that you would use with other ESD-
sensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
rating specified in Table 3.
Latch-Up Avoidance
Unlike conventional CMOS devices, UTSi CMOS
devices are immune to latch-up.
2
GND
IF1
7
3
RF
IF2
6
4
GND
PE4124
GND
5
Table 2. Pin Descriptions
Pin
No.
1
2
Pin
Name
LO
GND
LO Input
Description
Ground connection for Mixer. Traces
should be physically short and connect
immediately to ground plane for best
performance.
RF Input
Ground.
Ground.
IF differential output
IF differential output
Ground.
3
4
5
6
7
8
RF
GND
GND
IF1
IF2
GND
Table 3. Absolute Maximum Ratings
Symbol
T
ST
T
OP
P
LO
P
RF
VESD
Parameter/Conditions
Storage temperature
range
Operating temperature
range
LO input power
RF input power
ESD Sensitive Device
Min
-65
-40
Max
150
85
20
20
200
Units
°C
°C
dBm
dBm
V
Copyright
Peregrine Semiconductor Corp. 2001
File No. 70/0043~01B
|
UTSi
CMOS RFIC SOLUTIONS
Page 2 of 6
PE4124
Advance Information
Figure 4. Typical Application Schematic
LO
GND
GND
RF
IF1
IF2
GND
IF
GND
PE4124
U4 M/A-Com E-Series RF 1:1 Transformer ETC1-1-13
PEREGRINE SEMICONDUCTOR CORP.
|
http://www.peregrine-semi.com
Copyright
Peregrine Semiconductor Corp. 2001
Page 3 of 6
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