MC10SX1189
Fibre Channel Coaxial
Cable Driver and Loop
Resiliency Circuit
Description
The MC10SX1189 is a differential receiver, differential transmitter
specifically designed to drive coaxial cables. It incorporates the output
cable drive capability of the MC10EL89 Coaxial Cable Driver with
additional circuitry to multiplex the output cable drive source between
the cable receiver or the local transmitter inputs. The multiplexer
control circuitry is TTL compatible for ease of operation.
The MC10SX1189 is useful as a bypass element for Fibre
Channel-Arbitrated Loop (FC-AL) or Serial Storage Architecture
(SSA) applications, to create loop style interconnects with fault
tolerant, active switches at each device node. This device is
particularly useful for back panel applications where small size is
desirable.
The EL89 style drive circuitry produces swings twice as large as
a standard PECL output. When driving a coaxial cable, proper
termination is required at both ends of the line to minimize reflections.
The 1.6 V output swings allow for proper termination at both ends
of the cable, while maintaining the required swing at the receiving end
of the cable. Because of the larger output swings, the QT, QT outputs
are terminated into the thevenin equivalent of 50
W
to V
CC
−
3.0 V
instead of 50
W
to V
CC
−
2.0 V.
Features
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FIBRE CHANNEL COAXIAL
CABLE DRIVER AND LOOP
RESILIENCY CIRCUIT
16
1
SOIC−16
CASE 751B−05
MARKING DIAGRAM*
10SX1189G
AWLYWW
•
425 ps Propagation Delay
•
1.6 V Output Swing on the Cable Driving Output
•
Operation Range:
•
•
•
•
♦
V
CC
= 4.5 V to 5.5 V
75 kW Internal Input Pull Down Resistors
>1000 V ESD Protection
Transistor Count = 102
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
10SX1189 = Specific Device Code
A
= Assembly Location
WL
= Wafer Lot
Y
= Year
WW
= Work Week
G
= Pb-Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note
AND8002/D.
ORDERING INFORMATION
Device
MC10SX1189DG
Package
SOIC−16
(Pb-Free)
Shipping
48 Units/Tube
©
Semiconductor Components Industries, LLC, 2016
August, 2016
−
Rev. 5
1
Publication Order Number:
MC10SX1189/D
MC10SX1189
TRUTH TABLE
SEL
V
CC
16
DR
15
DR
14
GND
13
V
BB
12
DT
11
DT
10
SEL
9
L
H
Function
DR
→
QT
DT
→
QT
PIN NAMES
Pins
DR/DR
QR/QR
1
QR
2
QR
3
V
CC
4
NC
5
V
CC
6
QT
7
QT
8
V
CC
DT/DT
QT/QT
SEL
V
CC
GND
V
BB
Function
Differential Input from Receive Cable
Buffered Differential Output from Re-
ceive Cable
Differential Input to Transmit Cable
Buffered Differential Output to
Transmit Cable
Multiplexer Control Signal (TTL)
Positive Power Supply
Ground
Reference Voltage Output
Figure 1. Pinout: SOIC−16
(Top View)
LOCAL
RECEIVE DATA
(ECL LEVELS)
QR
QR
V
BB
DR
DR
FROM
INPUT CABLE
(ECL LEVELS)
LOCAL
TRANSMIT DATA
(ECL LEVELS)
1
DT
DT
SEL (TTL)
0
QT
QT
TO OUTPUT CABLE
(ENHANCED SWING)
Figure 2. LOGIC DIAGRAM
Table 1. ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
IN
I
OUT
Parameter
Power Supply Voltage (Referenced to GND)
Input Voltage (Referenced to GND)
Output Current
Continuous
Surge
Operating Temperature Range
Storage Temperature Range
Value
0 to +7.0
0 to +6.0
50
100
−40
to +85
−50
to +150
Unit
Vdc
Vdc
mA
T
A
T
STG
°C
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
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2
MC10SX1189
Table 2. DC CHARACTERISTICS
(V
CC
= 5.0 V, V
EE
= 0 V)
-40°C
Symbol
V
OH
V
OL
V
OH
V
OL
I
CC
V
IH
V
IL
V
IH
V
IL
V
BB
I
IH
I
IL
Characteristic
Output Voltage High (QR,QR)
V
CC
= 5.0 V, GND = 0 V (Notes 1, 2)
Output Voltage Low (QR,QR)
V
CC
= 5.0 V, GND = 0 V (Notes 1, 2)
Output Voltage High (QT,QT)
V
CC
= 5.0 V, GND = 0 V (Notes 1, 3)
Output Voltage Low (QT,QT)
V
CC
= 5.0 V, GND = 0 V (Notes 1, 3)
Quiescent Supply Current (Note 4)
Input Voltage High (DR,DR & DT,DT)
V
CC
= 5.0 V, GND = 0 V (Note 1)
Input Voltage Low (DR,DR & DT,DT)
V
CC
= 5.0 V, GND = 0 V (Note 1)
Input Voltage High SEL
Input Voltage Low SEL
Output Reference Voltage
V
CC
= 5.0 V, GND = 0 V (Note 1)
Input HIGH Current
Input LOW Current
0.5
3.57
3.63
Min
3.92
3.05
3.83
1.90
20
3.77
3.05
2.0
0.8
3.70
150
0.5
3.65
3.70
Typ
4.05
3.23
3.95
2.33
25
Max
4.22
3.35
4.10
2.50
42
4.11
3.50
Min
3.97
3.07
3.88
1.85
23
3.87
3.05
2.0
0.8
3.75
150
0.5
3.69
3.75
25°C
Typ
4.11
3.24
4.02
2.26
27
Max
4.27
3.37
4.15
2.45
47
4.19
3.52
Min
4.00
3.10
3.90
1.85
25
3.94
3.05
2.0
0.8
3.81
150
85°C
Typ
4.16
3.25
4.09
2.23
28
Max
4.30
3.41
4.17
2.45
47
4.28
3.56
Unit
V
V
V
V
mA
V
V
V
V
V
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Values will track 1:1 with the V
CC
supply. V
EE
can vary +0.5 V to
−0.5
V.
2. Outputs loaded with 50
W
to V
CC
−
2.0 V.
3. Outputs loaded with 50
W
to V
CC
−
3.0 V.
4. Outputs open circuited.
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3
MC10SX1189
Table 3. AC CHARACTERISTICS
(V
CC
= 4.5 V to 5.5 V) (Note 1)
−40°C
Symbol
t
PLH
,
t
PHL
Characteristic
Propagation Delay to Output
DR
→
QR (Diff)
(SE)
DR
→
QT (Diff)
(SE)
DT
→
QT (Diff)
(SE)
Propagation Delay
SEL
→
QT,QT
t
r
,
t
f
t
r
,
t
f
t
skew
V
PP
V
CMR
Rise TimeQR,QR
Fall Time
Rise TimeQT,QT
Fall Time
Within Device Skew
Minimum Input Swing
Common Mode Range
200
3.00
Min
175
150
250
225
225
200
450
100
100
150
150
Typ
300
300
425
425
400
400
600
275
275
300
300
15
1000
4.35
200
3.00
Max
450
500
650
700
650
725
850
400
400
550
550
Min
225
175
300
250
275
225
500
125
125
150
150
0 to 85°C
Typ
325
325
450
450
425
425
650
275
275
300
300
15
1000
4.35
Max
500
550
650
700
650
725
800
400
400
550
550
ps
ps
ps
mV
V
Unit
ps
Condition
Note 2
Note 3
1.5V to 50% Pt
20% to 80%
80% to 20%
20% to 80%
80% to 20%
Note 4
Note 5
Note 6
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. V
EE
can vary +0.5 V to
−0.5
V.
2. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the
differential output signals.
3. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal.
4. Duty cycle skew is the difference between t
PLH
and t
PHL
propagation delay through a device.
5. Minimum input swing for which AC parameters are guaranteed.
6. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls
within the specified range and the peak-to-peak voltage lies between V
PP Min
and 1.0 V.
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4
MC10SX1189
PACKAGE DIMENSIONS
SOIC−16
CASE 751B−05
ISSUE K
−A−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0
_
7
_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0
_
7
_
0.229
0.244
0.010
0.019
16
9
−B−
1
8
P
8 PL
0.25 (0.010)
M
B
S
G
F
K
C
−T−
SEATING
PLANE
R
X 45
_
M
D
16 PL
M
J
0.25 (0.010)
T B
S
A
S
STYLE 1:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
STYLE 5:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
COLLECTOR
BASE
EMITTER
NO CONNECTION
EMITTER
BASE
COLLECTOR
COLLECTOR
BASE
EMITTER
NO CONNECTION
EMITTER
BASE
COLLECTOR
EMITTER
COLLECTOR
STYLE 2:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
STYLE 6:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
CATHODE
ANODE
NO CONNECTION
CATHODE
CATHODE
NO CONNECTION
ANODE
CATHODE
CATHODE
ANODE
NO CONNECTION
CATHODE
CATHODE
NO CONNECTION
ANODE
CATHODE
STYLE 3:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
STYLE 7:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
COLLECTOR, DYE #1
BASE, #1
EMITTER, #1
COLLECTOR, #1
COLLECTOR, #2
BASE, #2
EMITTER, #2
COLLECTOR, #2
COLLECTOR, #3
BASE, #3
EMITTER, #3
COLLECTOR, #3
COLLECTOR, #4
BASE, #4
EMITTER, #4
COLLECTOR, #4
STYLE 4:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
SOLDERING FOOTPRINT
COLLECTOR, DYE #1
COLLECTOR, #1
COLLECTOR, #2
COLLECTOR, #2
COLLECTOR, #3
COLLECTOR, #3
COLLECTOR, #4
COLLECTOR, #4
BASE, #4
16X
EMITTER, #4
0.58
BASE, #3
EMITTER, #3
BASE, #2
EMITTER, #2
BASE, #1
EMITTER, #1
6.40
16X
8X
1.12
16
1
DRAIN, DYE #1
DRAIN, #1
DRAIN, #2
DRAIN, #2
DRAIN, #3
DRAIN, #3
DRAIN, #4
DRAIN, #4
GATE, #4
SOURCE, #4
GATE, #3
SOURCE, #3
GATE, #2
SOURCE, #2
GATE, #1
SOURCE, #1
CATHODE
CATHODE
CATHODE
CATHODE
CATHODE
CATHODE
CATHODE
CATHODE
ANODE
ANODE
ANODE
ANODE
ANODE
ANODE
ANODE
ANODE
SOURCE N‐CH
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
GATE P‐CH
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
SOURCE P‐CH
SOURCE P‐CH
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
GATE N‐CH
COMMON DRAIN (OUTPUT)
COMMON DRAIN (OUTPUT)
SOURCE N‐CH
1.27
PITCH
8
9
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free
strategy and soldering details, please
download the ON Semiconductor Soldering
and Mounting Techniques Reference Man-
ual,
SOLDERRM/D.
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