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MC10115FN

Description
Quad Line Receiver
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size84KB,4 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Download Datasheet Parametric Compare View All

MC10115FN Overview

Quad Line Receiver

MC10115FN Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerON Semiconductor
Parts packaging codeQLCC
package instructionQCCJ, LDCC20,.4SQ
Contacts20
Reach Compliance Code_compli
ECCN codeEAR99
Factory Lead Time1 week
Differential outputNO
Input propertiesDIFFERENTIAL
Interface integrated circuit typeLINE RECEIVER
Interface standardsGENERAL PURPOSE
JESD-30 codeS-PQCC-J20
JESD-609 codee0
length8.965 mm
Humidity sensitivity level1
Nominal negative supply voltage-5.2 V
Number of functions4
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-30 °C
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC20,.4SQ
Package shapeSQUARE
Package formCHIP CARRIER
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply-5.2 V
Certification statusNot Qualified
Maximum receive delay2.9 ns
Number of receiver bits4
Maximum seat height4.57 mm
Maximum slew rate29 mA
surface mountYES
technologyECL
Temperature levelOTHER
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width8.965 mm
MC10115
Quad Line Receiver
The MC10115 is a quad differential amplifier designed for use in
sensing differential signals over long lines. The base bias supply
(V
BB
) is made available at pin 9 to make the device useful as a Schmitt
trigger, or in other applications where a stable reference voltage is
necessary.
Active current sources provide the MC10115 with excellent
common mode noise rejection. If any amplifier in a package is not
used, one input of that amplifier must be connected to V
BB
(pin 9) to
prevent upsetting the current source bias network.
P
D
= 110 mW typ/pkg (No Load)
t
pd
= 2.0 ns typ
t
r
, t
f
= 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
4
5
7
6
10
11
13
12
V
BB
*
16
2
3
14
15
9
V
CC1
= PIN 1
V
CC2
= PIN 16
V
EE
= PIN 8
PLCC–20
FN SUFFIX
CASE 775
PDIP–16
P SUFFIX
CASE 648
1
1
10115
AWLYYWW
MC10115P
AWLYYWW
http://onsemi.com
MARKING
DIAGRAMS
16
CDIP–16
L SUFFIX
CASE 620
1
MC10115L
AWLYYWW
* V
BB
to be used to supply bias to the MC10115 only and bypassed (when used)
with 0.01
µ
F to 0.1
µ
F capacitor to ground (0 V). V
BB
can source < 1.0 mA.
When the input pin with the bubble goes positive, the output goes negative.
A
WL
YY
WW
= Assembly Location
= Wafer Lot
= Year
= Work Week
DIP
PIN ASSIGNMENT
V
CC1
A
OUT
B
OUT
A
IN
A
IN
B
IN
B
IN
V
EE
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC2
D
OUT
C
OUT
D
IN
D
IN
C
IN
C
IN
VBB
ORDERING INFORMATION
Device
MC10115L
MC10115P
MC10115FN
Package
CDIP–16
PDIP–16
PLCC–20
Shipping
25 Units / Rail
25 Units / Rail
46 Units / Rail
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
©
Semiconductor Components Industries, LLC, 2002
1
January, 2002 – Rev. 7
Publication Order Number:
MC10115/D

MC10115FN Related Products

MC10115FN MC10115 MC10115P MC10115L MC10115_02
Description Quad Line Receiver Quad Line Receiver Quad Line Receiver Quad Line Receiver Quad Line Receiver
Is it Rohs certified? incompatible - incompatible incompatible -
Maker ON Semiconductor - ON Semiconductor ON Semiconductor -
Parts packaging code QLCC - DIP DIP -
package instruction QCCJ, LDCC20,.4SQ - DIP-16 DIP-16 -
Contacts 20 - 16 16 -
Reach Compliance Code _compli - _compli _compli -
ECCN code EAR99 - EAR99 EAR99 -
Differential output NO - NO NO -
Input properties DIFFERENTIAL - DIFFERENTIAL DIFFERENTIAL -
Interface integrated circuit type LINE RECEIVER - LINE RECEIVER LINE RECEIVER -
Interface standards GENERAL PURPOSE - GENERAL PURPOSE GENERAL PURPOSE -
JESD-30 code S-PQCC-J20 - R-PDIP-T16 R-CDIP-T16 -
JESD-609 code e0 - e0 e0 -
length 8.965 mm - 19.175 mm 19.49 mm -
Nominal negative supply voltage -5.2 V - -5.2 V -5.2 V -
Number of functions 4 - 4 4 -
Number of terminals 20 - 16 16 -
Maximum operating temperature 85 °C - 85 °C 85 °C -
Minimum operating temperature -30 °C - -30 °C -30 °C -
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY CERAMIC, METAL-SEALED COFIRED -
encapsulated code QCCJ - DIP DIP -
Encapsulate equivalent code LDCC20,.4SQ - DIP16,.3 DIP16,.3 -
Package shape SQUARE - RECTANGULAR RECTANGULAR -
Package form CHIP CARRIER - IN-LINE IN-LINE -
Peak Reflow Temperature (Celsius) NOT SPECIFIED - 240 NOT SPECIFIED -
power supply -5.2 V - -5.2 V -5.2 V -
Certification status Not Qualified - Not Qualified Not Qualified -
Maximum receive delay 2.9 ns - 2.9 ns 2.9 ns -
Number of receiver bits 4 - 4 4 -
Maximum seat height 4.57 mm - 4.44 mm 5.08 mm -
Maximum slew rate 29 mA - 29 mA 29 mA -
surface mount YES - NO NO -
technology ECL - ECL ECL -
Temperature level OTHER - OTHER OTHER -
Terminal surface Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) -
Terminal form J BEND - THROUGH-HOLE THROUGH-HOLE -
Terminal pitch 1.27 mm - 2.54 mm 2.54 mm -
Terminal location QUAD - DUAL DUAL -
Maximum time at peak reflow temperature NOT SPECIFIED - 30 NOT SPECIFIED -
width 8.965 mm - 7.62 mm 7.62 mm -

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