SPMCK16Z1VPV16 datasheet, PDF - EEWORLD Datasheet

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SPMCK16Z1VPV16: DescriptionIC,MICROCONTROLLER,16-BIT,6816 CPU,CMOS,QFP,144PIN,PLASTIC; CategoryThe embedded processor and controller Microcontrollers and processors; File Size5MB，500 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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SPMCK16Z1VPV16 Overview

IC,MICROCONTROLLER,16-BIT,6816 CPU,CMOS,QFP,144PIN,PLASTIC

SPMCK16Z1VPV16 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	QFP
package instruction	PLASTIC, TQFP-144
Contacts	144
Reach Compliance Code	compliant
Is Samacsys	N
Has ADC	NO
Address bus width	24
bit size	16
CPU series	6816
maximum clock frequency	4.2 MHz
DAC channel	NO
DMA channel	NO
External data bus width	16
JESD-30 code	S-PQFP-G144
length	20 mm
Number of I/O lines	46
Number of terminals	144
Maximum operating temperature	105 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Encapsulate equivalent code	QFP144,.87SQ,20
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
power supply	5 V
Certification status	Not Qualified
RAM (bytes)	1024
rom(word)	0
Maximum seat height	1.6 mm
speed	16.78 MHz
Maximum slew rate	110 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	HCMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
width	20 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

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Freescale Semiconductor

Freescale Semiconductor, Inc...

M68HC16Z Series

User’s Manual

N O N - D I S C L O S U R E

MC68HC16Z1

MC68CK16Z1

MC68CM16Z1

MC68HC16Z2

MC68HC16Z3

MC68HC16Z4

MC68CK16Z4

A G R E E M E N T

HC16

R E Q U I R E D

Order this document by

MC68HC16ZUM/AD

Freescale Semiconductor, Inc.

TABLE OF CONTENTS

Paragraph

Title

SECTION 1

INTRODUCTION

SECTION 2

NOMENCLATURE

2.1

2.2

2.3

2.4

Symbols and Operators .............................................................................2-1

CPU16 Register Mnemonics .....................................................................2-2

Conventions ..............................................................................................2-6

SECTION 3

OVERVIEW

3.1

3.1.1

3.1.2

3.1.3

3.1.4

3.1.5

3.1.6

3.1.7

3.1.8

3.2

3.3

3.4

3.5

3.6

3.7

M68HC16 Z-Series MCU Features ...........................................................3-1

Central Processor Unit (CPU16/CPU16L) .........................................3-1

System Integration Module (SIM/SIML) ............................................3-1

Standby RAM (SRAM) ......................................................................3-1

Masked ROM Module (MRM) — (MC68HC16Z2/Z3 Only) ...............3-2

Analog-to-Digital Converter (ADC) ....................................................3-2

Queued Serial Module (QSM) ...........................................................3-2

Multichannel Communication Interface (MCCI) —

(MC68HC16Z4/CKZ4 Only) ..............................................................3-2

General-Purpose Timer (GPT) ..........................................................3-2

Intermodule Bus ........................................................................................3-2

System Block Diagram and Pin Assignment Diagrams .............................3-2

Pin Descriptions ......................................................................................3-11

Signal Descriptions ..................................................................................3-13

Internal Register Map ..............................................................................3-16

Address Space Maps ..............................................................................3-19

SECTION 4

CENTRAL PROCESSOR UNIT

4.1

4.2

4.2.1

4.2.2

4.2.3

4.2.4

4.2.5

4.2.6

General ......................................................................................................4-1

Accumulators .....................................................................................4-3

Index Registers .................................................................................4-3

Stack Pointer .....................................................................................4-3

Program Counter ...............................................................................4-3

Condition Code Register ...................................................................4-4

Address Extension Register and Address Extension Fields .............4-5

Page

Freescale Semiconductor, Inc...

M68HC16 Z SERIES

USER’S MANUAL

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TABLE OF CONTENTS

Paragraph

(Continued)

Title

Page

4.2.7

Multiply and Accumulate Registers ...................................................4-5

4.3

Memory Management ...............................................................................4-5

4.3.1

Address Extension ............................................................................4-6

4.3.2

Extension Fields ................................................................................4-6

4.4

Data Types ................................................................................................4-6

4.5

Memory Organization ................................................................................4-7

4.6

Addressing Modes .....................................................................................4-8

4.6.1

Immediate Addressing Modes ...........................................................4-9

4.6.2

Extended Addressing Modes ..........................................................4-10

4.6.3

Indexed Addressing Modes .............................................................4-10

4.6.4

Inherent Addressing Mode ..............................................................4-10

4.6.5

Accumulator Offset Addressing Mode .............................................4-10

4.6.6

Relative Addressing Modes .............................................................4-10

4.6.7

Post-Modified Index Addressing Mode ............................................4-10

4.6.8

Use of CPU16 Indexed Mode to Replace M68HC11 Direct Mode ..4-11

4.7

Instruction Set .........................................................................................4-11

4.7.1

Instruction Set Summary .................................................................4-11

4.8

Comparison of CPU16 and M68HC11 CPU Instruction Sets ..................4-31

4.9

Instruction Format ...................................................................................4-33

4.10

Execution Model ......................................................................................4-34

4.10.1

Microsequencer ...............................................................................4-35

4.10.2

Instruction Pipeline ..........................................................................4-35

4.10.3

Execution Unit .................................................................................4-35

4.11

Execution Process ...................................................................................4-36

4.11.1

Changes in Program Flow ...............................................................4-36

4.12

Instruction Timing ....................................................................................4-36

4.13

Exceptions ...............................................................................................4-37

4.13.1

Exception Vectors ...........................................................................4-37

4.13.2

Exception Stack Frame ...................................................................4-38

4.13.3

Exception Processing Sequence .....................................................4-39

4.13.4

Types of Exceptions ........................................................................4-39

4.13.4.1

Asynchronous Exceptions .......................................................4-39

4.13.4.2

Synchronous Exceptions .........................................................4-39

4.13.5

Multiple Exceptions .........................................................................4-40

4.13.6

RTI Instruction .................................................................................4-40

4.14

Development Support ..............................................................................4-40

4.14.1

Deterministic Opcode Tracking .......................................................4-40

4.14.1.1

IPIPE0/IPIPE1 Multiplexing .....................................................4-41

4.14.1.2

Combining Opcode Tracking with Other Capabilities ..............4-41

4.14.2

Breakpoints .....................................................................................4-41

4.14.3

Opcode Tracking and Breakpoints ..................................................4-42

M68HC16 Z SERIES

USER’S MANUAL

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TABLE OF CONTENTS

Paragraph

(Continued)

Title

Page

Freescale Semiconductor, Inc...

4.14.4

Background Debug Mode ................................................................4-42

4.14.4.1

Enabling BDM .........................................................................4-42

4.14.4.2

BDM Sources ..........................................................................4-42

4.14.4.3

Entering BDM ..........................................................................4-42

4.14.4.4

BDM Commands .....................................................................4-43

4.14.4.5

Returning from BDM ...............................................................4-43

4.14.4.6

BDM Serial Interface ...............................................................4-44

4.15

Recommended BDM Connection ............................................................4-45

4.16

Digital Signal Processing .........................................................................4-45

SECTION 5

SYSTEM INTEGRATION MODULE

5.1

5.2

5.2.1

5.2.2

5.2.3

5.2.4

5.2.5

5.3

5.3.1

5.3.2

5.3.3

5.3.4

5.4

5.4.1

5.4.2

5.4.3

5.4.4

5.4.5

5.4.6

5.4.7

5.4.8

5.5

5.5.1

5.5.1.1

5.5.1.2

5.5.1.3

5.5.1.4

5.5.1.5

5.5.1.6

General ......................................................................................................5-1

System Configuration ................................................................................5-2

Module Mapping ................................................................................5-2

Interrupt Arbitration ............................................................................5-3

Show Internal Cycles .........................................................................5-3

Freeze Operation ..............................................................................5-3

System Clock ............................................................................................5-4

Clock Sources ...................................................................................5-5

Clock Synthesizer Operation .............................................................5-6

External Bus Clock ..........................................................................5-21

Low-Power Operation ......................................................................5-21

System Protection ...................................................................................5-24

Reset Status ....................................................................................5-24

Bus Monitor .....................................................................................5-24

Halt Monitor .....................................................................................5-25

Spurious Interrupt Monitor ...............................................................5-25

Software Watchdog .........................................................................5-25

Periodic Interrupt Timer ...................................................................5-27

Interrupt Priority and Vectoring ........................................................5-28

Low-Power STOP Operation ...........................................................5-29

External Bus Interface .............................................................................5-29

Bus Control Signals .........................................................................5-31

Address Bus ............................................................................5-31

Address Strobe .......................................................................5-31

Data Bus .................................................................................5-31

Data Strobe .............................................................................5-31

Read/Write Signal ...................................................................5-32

Size Signals ............................................................................5-32

M68HC16 Z SERIES

USER’S MANUAL

For More Information On This Product,

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