IDT72V201L20PF datasheet, PDF - EEWORLD Datasheet

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IDT72V201L20PF: DescriptionFIFO, 256X9, 12ns, Synchronous, CMOS, PQFP32, PLASTIC, TQFP-32; Categorystorage storage; File Size114KB，14 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT72V201L20PF Overview

FIFO, 256X9, 12ns, Synchronous, CMOS, PQFP32, PLASTIC, TQFP-32

IDT72V201L20PF Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Parts packaging code	QFP
package instruction	PLASTIC, TQFP-32
Contacts	32
Reach Compliance Code	not_compliant
ECCN code	EAR99
Maximum access time	12 ns
Maximum clock frequency (fCLK)	50 MHz
period time	20 ns
JESD-30 code	S-PQFP-G32
JESD-609 code	e0
length	7 mm
memory density	2304 bit
Memory IC Type	OTHER FIFO
memory width	9
Humidity sensitivity level	3
Number of functions	1
Number of terminals	32
word count	256 words
character code	256
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	256X9
Exportable	YES
Package body material	PLASTIC/EPOXY
encapsulated code	LQFP
Encapsulate equivalent code	QFP32,.35SQ,32
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	225
power supply	3.3 V
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum standby current	0.005 A
Maximum slew rate	0.02 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	20
width	7 mm
Base Number Matches	1

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3.3 VOLT CMOS SyncFIFO™

256 x 9, 512 x 9,

1,024 x 9, 2,048 x 9,

4,096 x 9 and 8,192 x 9

IDT72V201, IDT72V211

IDT72V221, IDT72V231

IDT72V241, IDT72V251

FEATURES:

•

256 x 9-bit organization IDT72V201

512 x 9-bit organization IDT72V211

1,024 x 9-bit organization IDT72V221

2,048 x 9-bit organization IDT72V231

4,096 x 9-bit organization IDT72V241

8,192 x 9-bit organization IDT72V251

10 ns read/write cycle time

5V input tolerant

Read and Write clocks can be independent

Dual-Ported zero fall-through time architecture

Empty and Full Flags signal FIFO status

Programmable Almost-Empty and Almost-Full flags can be set to

any depth

Programmable Almost-Empty and Almost-Full flags default to

Empty+7, and Full-7, respectively

Output Enable puts output data bus in high-impedance state

Advanced submicron CMOS technology

Available in 32-pin plastic leaded chip carrier (PLCC) and 32-pin

plastic Thin Quad FlatPack (TQFP)

Industrial temperature range (–40°C to +85°C) is available

DESCRIPTION:

The IDT72V201/72V211/72V221/72V231/72V241/72V251 SyncFIFOs™

are very high-speed, low-power First-In, First-Out (FIFO) memories with

clocked read and write controls. The architecture, functional operation and pin

assignments are identical to those of the IDT72201/72211/72221/72231/

72241/72251, but operate at a power supply voltage (Vcc) between 3.0V and

3.6V. These devices have a 256, 512, 1,024, 2,048, 4,096 and 8,192 x 9-bit

memory array, respectively. These FIFOs are applicable for a wide variety of

data buffering needs such as graphics, local area networks and interprocessor

communication.

These FIFOs have 9-bit input and output ports. The input port is

controlled by a free-running clock (WCLK), and two Write Enable pins

(WEN1, WEN2). Data is written into the Synchronous FIFO on every rising

clock edge when the Write Enable pins are asserted. The output port is

controlled by another clock pin (RCLK) and two Read Enable pins (REN1,

REN2).

The Read Clock can be tied to the Write Clock for single clock

operation or the two clocks can run asynchronous of one another for dual-

clock operation. An Output Enable pin (OE) is provided on the read port

for three-state control of the output.

The Synchronous FIFOs have two fixed flags, Empty (EF) and Full (FF).

Two programmable flags, Almost-Empty (PAE) and Almost-Full (PAF), are

provided for improved system control. The programmable flags default to

Empty+7 and Full-7 for

PAE

and

PAF,

respectively. The programmable flag

offset loading is controlled by a simple state machine and is initiated by asserting

the Load pin (LD).

These FIFOs are fabricated using IDT's high-speed submicron CMOS

technology.

FUNCTIONAL BLOCK DIAGRAM

WCLK

WEN1

WEN2

INPUT REGISTER

OFFSET REGISTER

PAE

PAF

- D

WRITE CONTROL

LOGIC

RAM ARRAY

256 x 9, 512 x 9,

1,024 x 9, 2,048 x 9,

4,096 x 9, 8,192 x 9

FLAG

LOGIC

WRITE POINTER

READ POINTER

READ CONTROL

LOGIC

OUTPUT REGISTER

RESET LOGIC

RCLK

REN1

REN2

- Q

4092 drw 01

IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. SyncFIFO is a trademark of Integrated Device Technology, Inc.

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

FEBRUARY 2002

DSC-4092/2

IDT72V201L20PF Related Products

	IDT72V201L20PF	IDT72V241L20J	IDT72V251L10PF	IDT72V211L10PF	IDT72V211L15JI	IDT72V251L15JI	IDT72V251L10J	IDT72V251L15PF	IDT72V251L15J	IDT72V211L20J
Description	FIFO, 256X9, 12ns, Synchronous, CMOS, PQFP32, PLASTIC, TQFP-32	FIFO, 4KX9, 12ns, Synchronous, CMOS, PQCC32, PLASTIC, LCC-32	FIFO, 8KX9, 6.5ns, Synchronous, CMOS, PQFP32, PLASTIC, TQFP-32	FIFO, 512X9, 6.5ns, Synchronous, CMOS, PQFP32, PLASTIC, TQFP-32	FIFO, 512X9, 10ns, Synchronous, CMOS, PQCC32, PLASTIC, LCC-32	FIFO, 8KX9, 10ns, Synchronous, CMOS, PQCC32, PLASTIC, LCC-32	FIFO, 8KX9, 6.5ns, Synchronous, CMOS, PQCC32, PLASTIC, LCC-32	FIFO, 8KX9, 10ns, Synchronous, CMOS, PQFP32, PLASTIC, TQFP-32	FIFO, 8KX9, 10ns, Synchronous, CMOS, PQCC32, PLASTIC, LCC-32	FIFO, 512X9, 12ns, Synchronous, CMOS, PQCC32, PLASTIC, LCC-32
Is it lead-free?	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Parts packaging code	QFP	QFJ	QFP	QFP	QFJ	QFJ	QFJ	QFP	QFJ	QFJ
package instruction	PLASTIC, TQFP-32	PLASTIC, LCC-32	PLASTIC, TQFP-32	PLASTIC, TQFP-32	PLASTIC, LCC-32	PLASTIC, LCC-32	PLASTIC, LCC-32	PLASTIC, TQFP-32	PLASTIC, LCC-32	PLASTIC, LCC-32
Contacts	32	32	32	32	32	32	32	32	32	32
Reach Compliance Code	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
Maximum access time	12 ns	12 ns	6.5 ns	6.5 ns	10 ns	10 ns	6.5 ns	10 ns	10 ns	12 ns
Maximum clock frequency (fCLK)	50 MHz	50 MHz	100 MHz	100 MHz	66.7 MHz	66.7 MHz	100 MHz	66.7 MHz	66.7 MHz	50 MHz
period time	20 ns	20 ns	10 ns	10 ns	15 ns	15 ns	10 ns	15 ns	15 ns	20 ns
JESD-30 code	S-PQFP-G32	R-PQCC-J32	S-PQFP-G32	S-PQFP-G32	R-PQCC-J32	R-PQCC-J32	R-PQCC-J32	S-PQFP-G32	R-PQCC-J32	R-PQCC-J32
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0	e0	e0
length	7 mm	13.9954 mm	7 mm	7 mm	13.9954 mm	13.9954 mm	13.9954 mm	7 mm	13.9954 mm	13.9954 mm
memory density	2304 bit	36864 bit	73728 bit	4608 bit	4608 bit	73728 bit	73728 bit	73728 bit	73728 bit	4608 bit
Memory IC Type	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO
memory width	9	9	9	9	9	9	9	9	9	9
Humidity sensitivity level	3	1	3	3	1	1	1	3	1	1
Number of functions	1	1	1	1	1	1	1	1	1	1
Number of terminals	32	32	32	32	32	32	32	32	32	32
word count	256 words	4096 words	8192 words	512 words	512 words	8192 words	8192 words	8192 words	8192 words	512 words
character code	256	4000	8000	512	512	8000	8000	8000	8000	512
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	85 °C	85 °C	70 °C	70 °C	70 °C	70 °C
organize	256X9	4KX9	8KX9	512X9	512X9	8KX9	8KX9	8KX9	8KX9	512X9
Exportable	YES	YES	YES	YES	YES	YES	YES	YES	YES	YES
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LQFP	QCCJ	LQFP	LQFP	QCCJ	QCCJ	QCCJ	LQFP	QCCJ	QCCJ
Encapsulate equivalent code	QFP32,.35SQ,32	LDCC32,.5X.6	TQFP32,.35SQ,32	QFP32,.35SQ,32	LDCC32,.5X.6	LDCC32,.5X.6	LDCC32,.5X.6	TQFP32,.35SQ,32	LDCC32,.5X.6	LDCC32,.5X.6
Package shape	SQUARE	RECTANGULAR	SQUARE	SQUARE	RECTANGULAR	RECTANGULAR	RECTANGULAR	SQUARE	RECTANGULAR	RECTANGULAR
Package form	FLATPACK, LOW PROFILE	CHIP CARRIER	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER	FLATPACK, LOW PROFILE	CHIP CARRIER	CHIP CARRIER
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	225	225	225	225	225	225	225	225	225	225
power supply	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.6 mm	3.55 mm	1.6 mm	1.6 mm	3.55 mm	3.55 mm	3.55 mm	1.6 mm	3.55 mm	3.55 mm
Maximum standby current	0.005 A	0.005 A	0.005 A	0.005 A	0.005 A	0.005 A	0.005 A	0.005 A	0.005 A	0.005 A
Maximum slew rate	0.02 mA	0.02 mA	0.02 mA	0.02 mA	0.02 mA	0.02 mA	0.02 mA	0.02 mA	0.02 mA	0.02 mA
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING	J BEND	GULL WING	GULL WING	J BEND	J BEND	J BEND	GULL WING	J BEND	J BEND
Terminal pitch	0.8 mm	1.27 mm	0.8 mm	0.8 mm	1.27 mm	1.27 mm	1.27 mm	0.8 mm	1.27 mm	1.27 mm
Terminal location	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD
Maximum time at peak reflow temperature	20	20	20	20	20	20	20	20	20	20
width	7 mm	11.4554 mm	7 mm	7 mm	11.4554 mm	11.4554 mm	11.4554 mm	7 mm	11.4554 mm	11.4554 mm
Base Number Matches	1	1	1	1	1	1	-	-	-	-
Maker	-	-	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)

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