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USB97C102

Description
USB Bus Controller, CMOS, PQFP128, QFP-128
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size517KB,80 Pages
ManufacturerSMSC
Websitehttp://www.smsc.com/
Download Datasheet Parametric View All

USB97C102 Overview

USB Bus Controller, CMOS, PQFP128, QFP-128

USB97C102 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeQFP
package instructionFQFP, QFP128,.67X.93,20
Contacts128
Reach Compliance Codeunknown
Address bus width20
maximum clock frequency24 MHz
Maximum data transfer rate12 MBps
External data bus width8
JESD-30 codeR-PQFP-G128
JESD-609 codee0
length20 mm
Humidity sensitivity level3
Number of terminals128
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeFQFP
Encapsulate equivalent codeQFP128,.67X.93,20
Package shapeRECTANGULAR
Package formFLATPACK, FINE PITCH
Peak Reflow Temperature (Celsius)220
power supply3.3 V
Certification statusNot Qualified
Maximum seat height3.4 mm
Maximum slew rate100 mA
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width14 mm
uPs/uCs/peripheral integrated circuit typeBUS CONTROLLER, UNIVERSAL SERIAL BUS
Base Number Matches1
USB97C102
Multi-Endpoint USB Peripheral Controller with
Integrated 5 Port HUB
FEATURES
!"
High Performance USB Peripheral Controller
Engine
-
Integrated USB Transceiver
-
Serial Interface Engine (SIE)
-
8051 Microcontroller (MCU)
-
Patented Memory Management Unit (MMU)
-
4 Channel 8237 DMA Controller (ISADMA)
-
4K Byte On Board USB Packet Buffer
-
Quasi-ISA Peripheral Interface
-
USB Bus Snooping Capabilities
-
GPIOs
!"
Pin Compatible with SMSC USB97C100
!"
Complete USB Specification 1.1 Compatibility
-
Isochronous, Bulk, Interrupt, and Control Data
Independently Configurable per Endpoint
-
Dynamic Hardware Allocation of -Packet
Buffer for Virtual Endpoints
-
Multiple Virtual Endpoints (up to 16 TX, 16 RX
Simultaneously)
-
Multiple Alternate Address Filters
-
Dynamic Endpoint Buffer Length Allocation (0-
1280 Byte Packets)
!"
USB Full (12Mbps) and Low Speed Capability
!"
MMU and SRAM Buffer Allow Buffer Optimization
and Maximum Utilization of USB Bandwidth
-
128 Byte Page Size
-
10 Pages Maximum per Packet
-
32 Deep Receive Packet Queue
-
Up to 5 Deep Transmit Packet Queue, per
Endpoint
-
Hardware Generated Packet Header Records
Each Packet Status Automatically
-
Simultaneous Arbitration Between MCU, SIE,
and ISA DMA Accesses
!"
Extended Power Management
-
Standard 8051 "Stop Clock" Modes
Additional USB and ISA Suspend Resume
Events
-
Internal 8MHz Ring Oscillator for Immediate
Low Power Code Execution
-
24, 16, 12, 8, 4, and 2 MHz PLL Taps For on
the Fly MCU and DMA Clock Switching
-
Independent Clock/Power Management for
SIE, MMU, DMA and MCU
DMA Capability with ISA Memory
-
Four Independent Channels
-
Transfer Between Internal and External
Memory
-
Transfer Between I/O and Internal Memory
-
External Bus Master Capable
Scatter Gather DMA
-
Four Independent Channels
-
Up to 16 Transfers can be Programmed to
Occur Consecutively Without MCU
InterventionExternal MCU Memory Interface
-
1M Byte Code and Data Storage via 16K
Windows
-
Flash, SRAM, or EPROM
-
Downloadable via USB, Serial Port, or ISA
Peripheral
Quasi-ISA Interface Allows Interface to New and
"Legacy" Peripheral Devices
-
1M ISA Memory Space via 4K MCU Window
-
64K ISA I/O Space via 256 Byte MCU Window
-
4 External Interrupt Inputs
-
4 DMA Channels
-
Variable Cycle Timing
-
8 Bit Data Path
3.3 Volt, Low Power Operation
5 Volt Tolerant Operation on I/O Signal Pins
On Board Crystal Driver Circuit
128 Pin QFP Package
-
!"
!"
!"
!"
!"
!"
!"
GENERAL DESCRIPTION
The USB97C102 is a flexible, general purpose USB peripheral interface and controller ideally suited for multiple
endpoint applications. The USB97C102 provides an ISA-like bus interface, which will allow virtually any PC peripheral
to be placed at the end of a USB connection. Its unique dynamic buffer architecture overcomes the throughput
disadvantages of existing fixed FIFO buffer schemes allowing maximum utilization of the USB connection’s overall
bandwidth. This architecture minimizes the integrated microcontroller’s participation in the USB data flow, allowing
back-to-back packet transfers to block oriented devices. The efficiency of this architecture allows floppy drives to
coexist with other peripherals such as serial and parallel ports on a single USB link.
SMSC DS – USB97C102
Rev. 03/23/2000
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