DATA SHEET
µ
PD780306, 780308
8-BIT SINGLE-CHIP MICROCONTROLLER
MOS INTEGRATED CIRCUIT
DESCRIPTION
µ
PD780306 and 780308 are products in the
µ
PD780308 subseries within the 78K/0 series, which incorporates LCD
controller/driver, 8-bit resolution A/D converter, timer, serial interface, interrupt functions and many other peripheral
hardwares.
A one-time PROM product capable of operating in the same power supply voltage range as of the mask ROM product,
EPROM product,
µ
PD78P0308, and other development tools are available.
For the details of functional description, refer to the following user’s manual.
µ
PD780308, 780308Y Subseries User’s Manual
78K/0 Series User’s Manual (Instruction)
: U11377E
: U12326E
FEATURES
• Large on-chip ROM & RAM
Item
Product Name
µ
PD780306
Program Memory
(ROM)
48K bytes
60K bytes
Data Memory
Internal Extended RAM
1024 bytes
Internal High-Speed RAM
1024 bytes
LCD Display RAM
40
×
4 bits
µ
PD780308
• Minimum instruction execution time can be varied from high speed (0.4
µ
s) to ultra-low speed (122
µ
s)
• I/O ports: 57 (including segment signal output alternate-function pins)
• LCD controller/driver
Supply voltage
V
DD
= 2.0 to 5.5 V (Operable in any mode)
• 8-bit resolution A /D converter : 8 channels
• Serial interface : 3 channels
• Timer: 5 channels
• Supply voltage : V
DD
= 2.0 to 5.5 V
APPLICATIONS
Celullar phones, compact disk players, cameras, meters, etc.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
Document No. U11105EJ3V2DS00 (3rd edition)
Date Published August 2005 N CP(K)
Printed in Japan
The mark
shows major revised points.
µ
PD780306, 780308
ORDERING INFORMATION
Part Number
Package
100-pin plastic LQFP (Fine pitch) (14 x 14)
100-pin plastic LQFP (Fine pitch) (14 x 14)
100-pin plastic QFP (14 x 20)
100-pin plastic QFP (14 x 20)
100-pin plastic LQFP (Fine pitch) (14 x 14)
100-pin plastic LQFP (Fine pitch) (14 x 14)
100-pin plastic QFP (14 x 20)
100-pin plastic QFP (14 x 20)
µ
PD780306GC-×××-8EU
µ
PD780306GC-×××-8EU-A
µ
PD780306GF-×××-3BA
µ
PD780306GF-×××-3BA-A
µ
PD780308GC-×××-8EU
µ
PD780308GC-×××-8EU-A
µ
PD780308GF-×××-3BA
µ
PD780308GF-×××-3BA-A
Remark 1.
2.
×××
indicates ROM code suffix.
Products that have the part numbers suffixed by “-A” are lead-free products.
2
Data Sheet U11105EJ3V2DS
µ
PD780306, 780308
78K/0 SERIES LINEUP
The products in the 78K/0 Series are listed below. The names enclosed in boxes are subseries names.
Products in mass production
Products under development
Y subseries products are compatible with I
2
C bus.
Control
100-pin
100-pin
100-pin
100-pin
80-pin
80-pin
80-pin
80-pin
64-pin
64-pin
64-pin
64-pin
64-pin
42/44-pin
µ
PD78075B
µ
PD78078
µ
PD78070A
µ
PD780058
µ
PD78058F
µ
PD78054
µ
PD780065
µ
PD780078
µ
PD780034A
µ
PD780024A
µ
PD78014H
µ
PD78018F
µ
PD78083
Inverter control
EMI-noise reduced version of the
µ
PD78078
µ
PD78078Y
µ
PD78070AY
µ
PD780018AY
µ
PD780058Y
µ
PD78058FY
µ
PD78054Y
µ
PD78054 with timer and enhanced external interface
ROMless version of the
µ
PD78078
µ
PD78078Y with enhanced serial I/O and limited function
µ
PD78054 with enhanced serial I/O
EMI-noise reduced version of the
µ
PD78054
µ
PD78018F with UART and D/A converter, and enhanced I/O
µ
PD780024A with expanded RAM
µ
PD780034A with timer and enhanced serial I/O
µ
PD780078Y
µ
PD780034AY
µ
PD780024A with enhanced A/D converter
µ
PD780024AY
µ
PD78018F with enhanced serial I/O
EMI-noise reduced version of the
µ
PD78018F
µ
PD78018FY
Basic subseries for control
On-chip UART, capable of operating at low voltage (1.8 V)
64-pin
µ
PD780988
VFD drive
On-chip inverter control circuit and UART. EMI-noise reduced.
100-pin
78K/0
Series
80-pin
80-pin
80-pin
µ
PD780208
µ
PD780232
µ
PD78044H
µ
PD78044F
LCD drive
µ
PD78044F with enhanced I/O and VFD C/D. Display output total: 53
For panel control. On-chip VFD C/D. Display output total: 53
µ
PD78044F with N-ch open-drain I/O. Display output total: 34
Basic subseries for driving VFD. Display output total: 34
120-pin
120-pin
120-pin
100-pin
100-pin
100-pin
µ
PD780338
µ
PD780328
µ
PD780318
µ
PD780308
µ
PD78064B
µ
PD78064
µ
PD780308 with enhanced display function and timer. Segment signal output: 40 pins max.
µ
PD780308 with enhanced display function and timer. Segment signal output: 32 pins max.
µ
PD780308 with enhanced display function and timer. Segment signal output: 24 pins max.
µ
PD780308Y
µ
PD78064Y
µ
PD78064 with enhanced SIO, and expanded ROM and RAM
EMI-noise reduced version of the
µ
PD78064
Basic subseries for driving LCDs, on-chip UART
Bus interface supported
100-pin
80-pin
80-pin
80-pin
80-pin
64-pin
µ
PD780948
µ
PD78098B
µ
PD780702Y
µ
PD780703Y
µ
PD780833Y
µ
PD780816
Meter control
On-chip DCAN controller
µ
PD78054 with IEBus
TM
controller.
On-chip IEBus controller
On-chip DCAN controller
On-chip controller compliant with J1850 (Class 2)
Specialized for DCAN controller function
100-pin
80-pin
80-pin
µ
PD780958
µ
PD780852
µ
PD780824
For industrial meter control
On-chip automobile meter controller/driver
For automobile meter driver. On-chip DCAN controller
Remark
VFD (Vacuum Fluorescent Display) is referred to as FIP
TM
(Fluorescent Indicator Panel) in some documents,
but the functions of the two are the same.
Data Sheet U11105EJ3V2DS
3
µ
PD780306, 780308
The major functional differences among the subseries are shown below.
Function
Subseries Name
Control
ROM
Capacity
Timer
8-bit 16-bit Watch WDT
1 ch
1 ch
1 ch
8-Bit 10-Bit 8-Bit
A/D
8 ch
A/D
–
D/A
2 ch 3 ch (UART: 1 ch)
88
Serial Interface
I/O
V
DD
External
MIN.
Value Expansion
1.8 V
Yes
µ
PD78075B 32 K to 40 K 4 ch
µ
PD78078
µ
PD78070A
48 K to 60 K
–
61
3 ch (time-division UART: 1 ch)
3 ch (UART: 1 ch)
68
69
2.7 V
1.8 V
2.7 V
2.0 V
µ
PD780058 24 K to 60 K 2 ch
µ
PD78058F 48 K to 60 K
µ
PD78054
16 K to 60 K
–
2 ch
1 ch
8 ch
–
–
8 ch
µ
PD780065 40 K to 48 K
µ
PD780078 48 K to 60 K
µ
PD780034A 8 K to 32 K
µ
PD780024A
4 ch (UART: 1 ch)
3 ch (UART: 2 ch)
3 ch (UART: 1 ch)
60
52
51
2.7 V
1.8 V
µ
PD78014H
µ
PD78018F 8 K to 60 K
µ
PD78083
Inverter
control
VFD
drive
8 K to 16 K
–
–
–
1 ch
–
8 ch
–
2 ch
53
1 ch (UART: 1 ch)
3 ch (UART: 2 ch)
33
47
4.0 V
–
Yes
µ
PD780988 16 K to 60 K 3 ch
Note
µ
PD780208 32 K to 60 K 2 ch
µ
PD780232 16 K to 24 K 3 ch
µ
PD78044H 32 K to 48 K 2 ch
µ
PD78044F 16 K to 40 K
1 ch
–
1 ch
1 ch
–
1 ch
1 ch
8 ch
4 ch
8 ch
–
–
2 ch
74
40
2.7 V
4.5 V
2.7 V
–
1 ch
2 ch
68
LCD
drive
µ
PD780338 48 K to 60 K 3 ch
µ
PD780328
µ
PD780318
µ
PD780308 48 K to 60 K 2 ch
µ
PD78064B 32 K
µ
PD78064
16 K to 32 K
2 ch
2 ch
1 ch
1 ch
–
10 ch 1 ch 2 ch (UART: 1 ch)
54
62
70
1.8 V
–
1 ch
8 ch
–
–
3 ch (time-division UART: 1 ch)
2 ch (UART: 1 ch)
57
2.0 V
Bus
interface
µ
PD780948 60 K
µ
PD78098B 40 K to 60 K
2 ch
1 ch
2 ch
2 ch
1 ch
1 ch
8 ch
–
–
2 ch
3 ch (UART: 1 ch)
79
69
4.0 V
2.7 V
4.0 V
2.2 V
Yes
–
supported
µ
PD780816 32 K to 60 K
Meter
control
Dash
board
control
12 ch
–
1 ch
–
–
–
–
2 ch (UART: 1 ch)
2 ch (UART: 1 ch)
46
69
µ
PD780958 48 K to 60 K 4 ch
µ
PD780852 32 K to 40 K 3 ch
µ
PD780824 32 K to 60 K
–
1 ch
1 ch
1 ch
5 ch
–
–
3 ch (UART: 1 ch)
2 ch (UART: 1 ch)
56
59
4.0 V
–
Note
16-bit timer: 2 channels
10-bit timer: 1 channel
4
Data Sheet U11105EJ3V2DS
µ
PD780306, 780308
OVERVIEW OF FUNCTION
Product Name
Item
Internal
memory
ROM
High-speed RAM
Extended RAM
LCD display RAM
µ
PD780306
48K bytes
1024 bytes
1024 bytes
40
×
4 bits
8 bits
×
32 registers (8 bits
×
8 registers
×
4 banks)
µ
PD780308
60K bytes
General-purpose registers
Minimum instruction execution time
When main system clock
selected
When subsystem clock
selected
On-chip minimum instruction execution time cycle modification function
0.4
µ
s/0.8
µ
s/1.6
µ
s/3.2
µ
s/6.4
µ
s/12.8
µ
s (at 5.0 MHz operation)
122
µ
s (at 32.768 kHz operation)
• 16-bit operation
• Multiplication/division (8 bits
×
8 bits,16 bits
÷
8 bits)
• Bit manipulation (set, reset, test, boolean operation)
• BCD correction, etc.
Total
: 57
• CMOS input
:
02
• CMOS I/O
: 55
• 8-bit resolution
×
8 channels
• Segment signal output : Maximum 40
• Common signal output : Maximum 4
• Bias
: 1/2 or 1/3 switchable
• 3-wire serial I/O/SBI/2-wire serial I/O mode selectable : 1 channel
• 3-wire serial I/O/UART mode selectable
: 1 channel
• 3-wire serial I/O mode
: 1 channel
• 16-bit timer/event counter
• 8-bit timer/event counter
• Watch timer
• Watchdog timer
:
:
:
:
1 channel
2 channels
1 channel
1 channel
Instruction set
I/O ports
(including segment signal output pins)
A/D converter
LCD controller/driver
Serial interface
Timer
Timer output
3 (14-bit PWM output capability : 1)
19.5 kHz, 39.1 kHz, 78.1 kHz, 156 kHz, 313 kHz, 625 kHz, 1.25 MHz, 2.5 MHz,
5.0 MHz (at main system clock: 5.0 MHz operation)
32.768 kHz (at subsystem clock: 32.768 kHz operation)
1.2 kHz, 2.4 kHz, 4.9 kHz, 9.8 kHz (at main system clock 5.0 MHz operation)
Maskable
Non-maskable
Software
Internal : 13, external :
Internal : 1
1
Internal : 1, external: 1
V
DD
= 2.0 to 5.5 V
• 100-pin plastic LQFP (Fine pitch) (14 x 14)
• 100-pin plastic QFP (14 x 20)
6
Clock output
Buzzer output
Vectored
interrupt
sources
Test input
Supply voltage
Package
Data Sheet U11105EJ3V2DS
5
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