M95320-WMN3/B datasheet, PDF - EEWORLD Datasheet

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M95320-WMN3/B: Description8K X 8 SPI BUS SERIAL EEPROM, PDSO8; Categorystorage storage; File Size721KB，53 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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M95320-WMN3/B Overview

8K X 8 SPI BUS SERIAL EEPROM, PDSO8

M95320-WMN3/B Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	STMicroelectronics
Parts packaging code	SOIC
package instruction	0.150 INCH, PLASTIC, SO-8
Contacts	8
Reach Compliance Code	compli
ECCN code	EAR99
Other features	1 MILLION ERASE/WRITE CYCLES; 40 YEARS DATA RETENTION
Maximum clock frequency (fCLK)	5 MHz
Data retention time - minimum	40
Durability	1000000 Write/Erase Cycles
JESD-30 code	R-PDSO-G8
JESD-609 code	e4
length	4.9 mm
memory density	32768 bi
Memory IC Type	EEPROM
memory width	8
Number of functions	1
Number of terminals	8
word count	4096 words
character code	4000
Operating mode	SYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
organize	4KX8
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP8,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Parallel/Serial	SERIAL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3/5 V
Certification status	Not Qualified
Maximum seat height	1.75 mm
Serial bus type	SPI
Maximum standby current	0.000002 A
Maximum slew rate	0.003 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	2.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	3.9 mm
Maximum write cycle time (tWC)	5 ms
write protect	HARDWARE/SOFTWARE

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M95640-W M95640-R

M95640-DF

64-Kbit serial SPI bus EEPROM with high-speed clock

Datasheet

production data

Features

•

Compatible with the Serial Peripheral Interface

(SPI) bus

SO8 (MN)

150 mil width

•

Memory array

– 64 Kb (8 Kbytes) of EEPROM

– Page size: 32 bytes

•

Write

– Byte Write within 5 ms

– Page Write within 5 ms

•

Additional Write lockable page (Identification

page)

TSSOP8 (DW)

169 mil width

•

Write Protect: quarter, half or whole memory

array

•

High-speed clock: 20 MHz

•

Single supply voltage:

– 2.5 V to 5.5 V for M95640-W

– 1.8 V to 5.5 V for M95640-R

– 1.7 V to 5.5 V for M95640-DF

•

Operating temperature range: from -40°C up to

+85°C

•

Enhanced ESD protection

•

More than 4 million Write cycles

•

More than 200-year data retention

•

Packages:

– SO8 (ECOPACK2

)

– TSSOP8 (ECOPACK2

)

– UFDFPN8 (ECOPACK2

)

– WLCSP (ECOPACK2

)

UFDFPN8 (MC)

2 x 3 mm

WLCSP (CT)

February 2016

This is information on a product in full production.

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www.st.com

Contents

M95640-W M95640-R M95640-DF

Contents

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3.1

3.2

3.3

3.4

3.5

3.6

3.7

3.8

Serial Data Output (Q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Serial Data Input (D) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Serial Clock (C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Chip Select (S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Hold (HOLD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Write Protect (W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Connecting to the SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.1

SPI modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Operating features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

5.1

Supply voltage (V

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

5.1.1

5.1.2

5.1.3

5.1.4

Operating supply voltage (V

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.2

5.3

5.4

5.5

Active Power and Standby Power modes . . . . . . . . . . . . . . . . . . . . . . . . 14

Hold condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Data protection and protocol control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

6.1

6.2

6.3

Write Enable (WREN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Write Disable (WRDI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Read Status Register (RDSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

6.3.1

WIP bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

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6.3.2

6.3.3

6.3.4

Contents

WEL bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

BP1, BP0 bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

SRWD bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

6.4

6.5

6.6

6.7

6.8

6.9

6.10

Write Status Register (WRSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Read from Memory Array (READ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Write to Memory Array (WRITE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

6.6.1

Cycling with Error Correction Code (ECC) . . . . . . . . . . . . . . . . . . . . . . 26

Read Identification Page (available only in M95640-D devices) . . . . . . . 27

Write Identification Page (available only in M95640-D devices) . . . . . . . 28

Read Lock Status (available only in M95640-D devices) . . . . . . . . . . . . . 29

Lock ID (available only in M95640-D devices) . . . . . . . . . . . . . . . . . . . . . 30

Power-up and delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

7.1

7.2

Power-up state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

10.1

10.2

10.3

10.4

SO8N package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

TSSOP8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

UFDFN8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Thin WLCSP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

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List of tables

M95640-W M95640-R M95640-DF

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Table 26.

Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Write-protected block size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Instruction set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Significant bits within the two address bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Status Register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Protection modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Operating conditions (M95640-W, device grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Operating conditions (M95640-R, device grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Operating conditions (M95640-DF, device grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Cycling performance by groups of four bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Memory cell data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

DC characteristics (M95640-W, device grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

DC characteristics (M95640-R, device grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

DC characteristics (M95640-DF, device grade 6). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

AC characteristics (M95640-W, device grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

AC characteristics (M95640-R, device grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

AC characteristics (M95640-DF, device grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

SO8N – 8-lead plastic small outline, 150 mils body width,

package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

TSSOP8 – 8-lead thin shrink small outline, 3 x 4.4 mm, 0.65 mm pitch,

package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

UFDFN8 - 8-lead, 2 × 3 mm, 0.5 mm pitch ultra thin profile fine pitch

dual flat package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Thin WLCSP- 8-bump, 1.073 x 0.959 mm, wafer level chip scale

package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

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List of figures

Figure 1.

Figure 2.

Figure 3.

Figure 4.

Figure 5.

Figure 6.

Figure 7.

Figure 8.

Figure 9.

Figure 10.

Figure 11.

Figure 12.

Figure 13.

Figure 14.

Figure 15.

Figure 16.

Figure 17.

Figure 18.

Figure 19.

Figure 20.

Figure 21.

Figure 22.

Figure 23.

Figure 24.

Figure 25.

Figure 26.

Figure 27.

Figure 28.

Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

8-pin package connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

8-bump thin WLCSP connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Bus master and memory devices on the SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

SPI modes supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Hold condition activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Write Enable (WREN) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Write Disable (WRDI) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Read Status Register (RDSR) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Write Status Register (WRSR) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Read from Memory Array (READ) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Byte Write (WRITE) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Page Write (WRITE) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Read Identification Page sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Write identification page sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Read Lock Status sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Lock ID sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Serial input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Hold timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Serial output timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

SO8N – 8-lead plastic small outline, 150 mils body width, package outline . . . . . . . . . . . . 42

SO8N – 8-lead plastic small outline, 150 mils body width,

package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

TSSOP8 – 8-lead thin shrink small outline, 3 x 4.4 mm, 0.65 mm pitch,

package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

UFDFN8 - 8-lead, 2 × 3 mm, 0.5 mm pitch ultra thin profile fine pitch

dual flat package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Thin WLCSP- 8-bump, 1.073 x 0.959 mm, wafer level chip scale

package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Thin WLCSP- 8-bump, 1.073 x 0.959 mm, wafer level chip scale

package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

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