M95040-RMB3TG/W datasheet, PDF

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M95040-RMB3TG/W: Description4 Kbit, 2 Kbit and 1 Kbit Serial SPI bus EEPROM with high speed Clock; Categorystorage storage; File Size201KB，42 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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M95040-RMB3TG/W Overview

4 Kbit, 2 Kbit and 1 Kbit Serial SPI bus EEPROM with high speed Clock

M95040-RMB3TG/W Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	STMicroelectronics
Parts packaging code	SOIC
package instruction	2 X 3 MM, ROHS COMPLIANT, MLP-8
Contacts	8
Reach Compliance Code	compli
ECCN code	EAR99
Maximum clock frequency (fCLK)	2 MHz
Data retention time - minimum	40
Durability	1000000 Write/Erase Cycles
JESD-30 code	R-XDSO-N8
length	3 mm
memory density	4096 bi
Memory IC Type	EEPROM
memory width	8
Number of functions	1
Number of terminals	8
word count	512 words
character code	512
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
organize	512X8
Package body material	UNSPECIFIED
encapsulated code	VSON
Encapsulate equivalent code	SOLCC8,.11,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, VERY THIN PROFILE
Parallel/Serial	SERIAL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2/5 V
Certification status	Not Qualified
Maximum seat height	0.6 mm
Serial bus type	SPI
Maximum standby current	0.000005 A
Maximum slew rate	0.002 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	1.8 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	2 mm
Maximum write cycle time (tWC)	10 ms
write protect	HARDWARE/SOFTWARE

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M95040

M95020 M95010

4 Kbit, 2 Kbit and 1 Kbit Serial SPI bus EEPROM

with high speed Clock

Feature summary

■

Compatible with SPI bus serial interface

(Positive Clock SPI Modes)

Single supply voltage:

– 4.5 V to 5.5 V for M950x0

– 2.5 V to 5.5 V for M950x0-W

– 1.8 V to 5.5 V for M950x0-R

High Speed

– 10 MHz Clock rate, 5 ms Write time

Status Register

Byte and Page Write (up to 16 bytes)

Self-timed programming cycle

Adjustable size read-only EEPROM area

Enhanced ESD Protection

More than 1 Million Write cycles

More than 40-year data retention

Packages

– ECOPACK® (RoHS compliant)

Product list

Part Number

M95040

M95040-W

M95040-R

M95020

M95020-W

M95020-R

M95010

M95010-W

M95010-R

■

SO8 (MN)

150 mil width

■

TSSOP8 (DW)

169 mil width

Table 1.

Reference

UFDFPN8 (MB)

2 × 3mm

November 2006

Rev 7

1/42

www.st.com

Contents

M95040, M95020, M95010

Contents

Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.1

2.2

2.3

2.4

2.5

2.6

2.7

2.8

Serial Data Output (Q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Serial Data Input (D) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Serial Clock (C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Chip Select (S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Hold (HOLD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Write Protect (W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Supply voltage (V

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.8.1

2.8.2

2.8.3

2.8.4

Operating supply voltage V

CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Internal device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Connecting to the SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.1

SPI modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Operating features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.1

4.2

4.3

Hold Condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Data Protection and Protocol control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

6.1

6.2

6.3

Write Enable (WREN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Write Disable (WRDI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Read Status Register (RDSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

6.3.1

6.3.2

6.3.3

WIP bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

WEL bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

BP1, BP0 bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2/42

List of tables

M95040, M95020, M95010

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Table 26.

Table 27.

Product list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Write-Protected block size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Instruction set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Status Register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Address range bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Operating conditions (M950x0). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Operating conditions (M950x0-W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Operating conditions (M950x0-R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

AC test measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

DC characteristics (M950x0, Device Grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

DC characteristics (M950x0, Device Grade 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

DC characteristics (M950x0-W, Device Grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

DC characteristics (M950x0-W, Device Grade 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

DC characteristics (M950x0-R). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

AC characteristics (M950x0, Device Grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

AC characteristics (M950x0, Device Grade 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

AC characteristics (M950x0-W, Device Grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

AC characteristics (M950x0-W, Device Grade 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

AC characteristics (M950x0-R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

SO8N - 8 lead Plastic Small Outline, 150 mils body width, package

mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

TSSOP8 – 8 lead Thin Shrink Small Outline, package mechanical data . . . . . . . . . . . . . . 37

UFDFPN8 (MLP8) - 8-lead Ultra thin Fine pitch Dual Flat Package No lead

2 × 3mm, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

4/42

M95040, M95020, M95010

List of figures

Figure 1.

Figure 2.

Figure 3.

Figure 4.

Figure 5.

Figure 6.

Figure 7.

Figure 8.

Figure 9.

Figure 10.

Figure 11.

Figure 12.

Figure 13.

Figure 14.

Figure 15.

Figure 16.

Figure 17.

Figure 18.

Figure 19.

Figure 20.

Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

8-pin package connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Bus master and memory devices on the SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

SPI modes supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Hold Condition activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Write Enable (WREN) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Write Disable (WRDI) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Read Status Register (RDSR) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Write Status Register (WRSR) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Read from Memory Array (READ) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Byte Write (WRITE) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Page Write (WRITE) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

AC test measurement I/O waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Serial input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Hold timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Output timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

SO8N - 8 lead Plastic Small Outline, 150 mils body width, package outline . . . . . . . . . . . 36

TSSOP8 – 8 lead Thin Shrink Small Outline, package outline . . . . . . . . . . . . . . . . . . . . . . 37

UFDFPN8 (MLP8) - 8-lead Ultra thin Fine pitch Dual Flat Package No lead

2 × 3mm, package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

5/42

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Standard application circuit diagram of MAX742

Dual encoding circuit diagram

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

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