TS87C54X2-MLCD datasheet, PDF - EEWORLD Datasheet

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TS87C54X2-MLCD: DescriptionMicrocontroller, 8-Bit, OTPROM, 40MHz, CMOS, PQFP44, PLASTIC, QFP-44; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，58 Pages; ManufacturerAtmel (Microchip); Environmental Compliance

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TS87C54X2-MLCD Overview

Microcontroller, 8-Bit, OTPROM, 40MHz, CMOS, PQFP44, PLASTIC, QFP-44

TS87C54X2-MLCD Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Parts packaging code	QFP
package instruction	QFP,
Contacts	44
Reach Compliance Code	compliant
ECCN code	3A991.A.2
Has ADC	NO
Address bus width	16
bit size	8
maximum clock frequency	40 MHz
DAC channel	NO
DMA channel	NO
External data bus width	8
JESD-30 code	S-PQFP-G44
JESD-609 code	e3
length	10 mm
Number of I/O lines	32
Number of terminals	44
Maximum operating temperature	70 °C
Minimum operating temperature
PWM channel	NO
Package body material	PLASTIC/EPOXY
encapsulated code	QFP
Package shape	SQUARE
Package form	FLATPACK
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
ROM programmability	OTPROM
Maximum seat height	2.4 mm
speed	40 MHz
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
width	10 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

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TS80C54X2/C58X2

TS87C54X2/C58X2

8-bit CMOS Microcontroller 16/32 Kbytes ROM/OTP

1. Description

TS80C54/58X2 is high performance CMOS ROM, OTP

and EPROM versions of the 80C51 CMOS single chip

8-bit microcontroller.

The TS80C54/58X2 retains all features of the Atmel

Wireless & Microcontrollers 80C51 with extended

ROM/EPROM capacity (16/32 Kbytes), 256 bytes of

internal RAM, a 6-source , 4-level interrupt system, an

on-chip oscilator and three timer/counters.

In addition, the TS80C54/58X2 has a Hardware

Watchdog Timer, a more versatile serial channel that

facilitates multiprocessor communication (EUART) and

a X2 speed improvement mechanism.

The fully static design of the TS80C54/58X2 allows to

reduce system power consumption by bringing the clock

frequency down to any value, even DC, without loss of

data.

The TS80C54/58X2 has 2 software-selectable modes of

reduced activity for further reduction in power

consumption. In the idle mode the CPU is frozen while

the timers, the serial port and the interrupt system are still

operating. In the power-down mode the RAM is saved

and all other functions are inoperative.

2. Features

80C52 Compatible

•

8051 pin and instruction compatible

•

Four 8-bit I/O ports

•

Three 16-bit timer/counters

•

256 bytes scratchpad RAM

Interrupt Structure with

•

6 Interrupt sources

•

4 level priority interrupt system

Full duplex Enhanced UART

•

Framing error detection

•

Automatic address recognition

High-Speed Architecture

•

40 MHz @ 5V, 30MHz @ 3V

•

X2 Speed Improvement capability (6 clocks/

machine cycle)

30 MHz @ 5V, 20 MHz @ 3V (Equivalent to

60 MHz @ 5V, 40 MHz @ 3V)

Low EMI (inhibit ALE)

Power Control modes

•

Idle mode

•

Power-down mode

•

Power-off Flag

Dual Data Pointer

On-chip ROM/EPROM (16K-bytes, 32K-bytes)

Programmable Clock Out and Up/Down Timer/

Counter 2

Hardware Watchdog Timer (One-time enabled with

Reset-Out)

Asynchronous port reset

Once mode (On-chip Emulation)

Power supply: 4.5-5.5V, 2.7-5.5V

Temperature ranges: Commercial (0 to 70

C) and

Industrial (-40 to 85

Packages: PDIL40, PLCC44, VQFP44 1.4, PQFP44

F1, CQPJ44 (window), CDIL40 (window)

Rev. C - 15 January, 2001

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