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M50FW080NB5TP

Description
8 Mbit 1Mb x8, Uniform Block 3V Supply Firmware Hub Flash Memory
Categorystorage    storage   
File Size282KB,56 Pages
ManufacturerSTMicroelectronics
Websitehttp://www.st.com/
Environmental Compliance
Download Datasheet Parametric View All

M50FW080NB5TP Overview

8 Mbit 1Mb x8, Uniform Block 3V Supply Firmware Hub Flash Memory

M50FW080NB5TP Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerSTMicroelectronics
Parts packaging codeTSOP
package instruction8 X 14 MM, ROHS COMPLIANT, PLASTIC, TSOP-32
Contacts32
Reach Compliance Codeunknow
ECCN codeEAR99
Maximum access time11 ns
command user interfaceYES
Data pollingNO
JESD-30 codeR-PDSO-G32
JESD-609 codee3/e6
length12.4 mm
memory density8388608 bi
Memory IC TypeFLASH
memory width8
Number of functions1
Number of departments/size16
Number of terminals32
word count1048576 words
character code1000000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-20 °C
organize1MX8
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP1
Encapsulate equivalent codeTSSOP32,.56,20
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Programming voltage3 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Department size64K
Maximum standby current0.0001 A
Maximum slew rate0.06 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelOTHER
Terminal surfaceTIN/TIN BISMUTH
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
switch bitNO
typeNOR TYPE
width8 mm
M50FW080
8-Mbit (1 Mb ×8, Uniform Block)
3-V supply, Firmware Hub Flash memory
Feature summary
Supply voltage
– V
CC
= 3 V to 3.6 V for Program, Erase and
Read operations
– V
PP
= 12 V for fast program and fast erase
(optional)
Two interfaces
– Firmware Hub (FWH) Interface for
embedded operation with PC Chipsets
– Address/Address Multiplexed (A/A Mux)
Interface for programming equipment
compatibility
Firmware hub (FWH) hardware interface mode
– 5 signal communication interface
supporting Read and Write operations
– Hardware Write Protect pins for block
protection
– Register-based Read and Write Protection
– 5 additional general-purpose inputs for
platform design flexibility
– Synchronized with 33 MHz PCI clock
Programming time
– 10 µs typical
– Quadruple Byte Programming option
16 uniform 64 Kbyte memory blocks
Program/Erase Controller
– Embedded Byte Program and Block/Chip
Erase algorithms
– Status Register bits
Program and Erase Suspend
– Read other Blocks during Program/Erase
Suspend
– Program other Blocks during Erase
Suspend
For use in PC BIOS applications
PLCC32 (K)
TSOP32 (NB)
8 x 14mm
TSOP40 (N)
10 x 20mm
Electronic signature
– Manufacturer code: 20h
– Device Code: 2Dh
Packages
– ECOPACK® (RoHS compliant)
October 2006
Rev 10
1/56
www.st.com
1

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