M48T86PC1E datasheet, PDF - EEWORLD Datasheet

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M48T86PC1E: Description1 TIMER(S), REAL TIME CLOCK, PDSO28; CategoryThe embedded processor and controller Microcontrollers and processors; File Size289KB，36 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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M48T86PC1E Overview

1 TIMER(S), REAL TIME CLOCK, PDSO28

M48T86PC1E Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	STMicroelectronics
Parts packaging code	DIP
package instruction	DIP,
Contacts	24
Reach Compliance Code	compli
External data bus width	8
Information access methods	PARALLEL, MUXED BUS
JESD-30 code	R-PDIP-T24
JESD-609 code	e3
length	34.545 mm
Number of terminals	24
Number of timers	1
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Maximum seat height	9.65 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Matte Tin (Sn)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	18.085 mm

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M48T86

5.0 V PC real-time clock

Not For New Design

Features

■

Drop-in replacement for PC computer

clock/calendar

Counts seconds, minutes, hours, days, day of

the week, date, month, and year with leap year

compensation

Clock accuracy better than

1 minute per

month

Interfaced with software as 128 RAM locations:

– 14 bytes of clock and control registers

– 114 bytes of general purpose RAM

Selectable bus timing (Intel/Motorola)

Three interrupts are separately software-

maskable and testable

– Time-of-day alarm (once/second to

once/day)

– Periodic rates from 122 µs to 500 ms

– End-of-clock update cycle

Programmable square wave output

■

)

-O

■

PCDIP24 (PC)

Battery/Crystal

CAPHAT

SNAPHAT (SH)

Battery/Crystal

10 years of data retention and clock operation

in the absence of power

Self-contained battery and crystal in the

CAPHAT™ DIP package

Packaging includes a 28-lead SOIC and

SNAPHAT

top (to be ordered separately)

SOIC package provides direct connection for a

SNAPHAT top contains the battery and crystal

Pin and function compatible with bq3285/7A

and DS12887

RoHS compliant

– Lead-free second level interconnect

SOH28 (MH)

December 2008

Rev 7

1/36

www.st.com

This is information on a product still in production but not recommended for new designs.

Contents

M48T86

Contents

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.1

Signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.1.1

2.1.2

2.1.3

2.1.4

2.1.5

2.1.6

2.1.7

2.1.8

2.1.9

2.1.10

2.1.11

2.1.12

, V

SS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

SQW (square wave output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

AD0-AD7 (multiplexed bidirectional address/data bus) . . . . . . . . . . . . . . 9

AS (address strobe input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

MOT (mode select) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

DS (data strobe input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

E (chip enable input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

IRQ (interrupt request output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

RST (reset input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

RCL (RAM clear) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

R/W (read/write input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Non-volatile RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

)

-O

3.1

3.2

3.3

3.4

3.5

3.6

3.7

3.8

3.9

3.10

3.10.1

3.10.2

3.10.3

Clock operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Address map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Time, calendar, and alarm locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Periodic interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Alarm interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Update cycle interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Oscillator control bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Update cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Square wave output selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

UIP update in progress . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

OSC0, OSC1, OSC2 oscillator control . . . . . . . . . . . . . . . . . . . . . . . . . 19

RS3, RS2, RS1, RS0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.11

3.11.1

SET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2/36

M48T86

3.11.2

3.11.3

3.11.4

3.11.5

3.11.6

3.11.7

3.11.8

Contents

PIE: periodic interrupt enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

AIE: alarm interrupt enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

UIE: update ended interrupt enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

SQWE: square wave enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

DM: data mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

24/12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

DSE: daylight savings enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.12

3.12.1

3.12.2

3.12.3

3.12.4

3.12.5

IRQF: interrupt request flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

PF: periodic interrupt flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

AF: alarm flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

UF: update ended interrupt flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

BIT 0 through 3: unused bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.13

3.13.1

3.13.2

VRT: valid RAM and time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

BIT 0 through 6: unused bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.14

noise and negative going transients . . . . . . . . . . . . . . . . . . . . . . . . . 23

)

-O

Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Environmental information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

3/36

M48T86PC1E Related Products

	M48T86PC1E	M48T86PC1TR	M48T86PC1F	M48T86_07	M48T86MH1TR
Description	1 TIMER(S), REAL TIME CLOCK, PDSO28	1 TIMER(S), REAL TIME CLOCK, PDSO28	1 TIMER(S), REAL TIME CLOCK, PDSO28	1 TIMER(S), REAL TIME CLOCK, PDSO28	1 TIMER(S), REAL TIME CLOCK, PDSO28
Maker	STMicroelectronics	STMicroelectronics	-	-	STMicroelectronics
Parts packaging code	DIP	DIP	-	-	SOIC
package instruction	DIP,	DIP,	-	-	SOP, SOP28,.5
Contacts	24	24	-	-	28
Reach Compliance Code	compli	unknow	-	-	compli
External data bus width	8	8	8	8	-
Information access methods	PARALLEL, MUXED BUS	PARALLEL, MUXED BUS	Parallel, MUXED bus	Parallel, MUXED bus	-
Number of terminals	24	24	28	28	-
Number of timers	1	1	1	1	-
Maximum operating temperature	70 °C	70 °C	70 Cel	70 Cel	-
surface mount	NO	NO	Yes	Yes	-
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	-
Terminal form	THROUGH-HOLE	THROUGH-HOLE	GULL WING	GULL WING	-
Terminal location	DUAL	DUAL	pair	pair	-

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