IS62LV12816L/LL
128K x 16 CMOS STATIC RAM
FEATURES
• High-speed access time: 55, 70, 100 ns
• CMOS low power operation
– 120 mW (typical) operating
– 6 µW (typical) CMOS standby
• TTL compatible interface levels
• Single 2.5V-3.0V V
CC
power supply
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• Available in the 44-pin TSOP (Type II) and
48-pin mini BGA
ISSI
DESCRIPTION
®
JANUARY 2000
The
ISSI
IS62LV12816L and IS62LV12816LL are high-
speed, 2,097,152-bit static RAMs organized as 131,072
words by 16 bits. They are fabricated using
ISSI
's high-
performance CMOS technology. This highly reliable process
coupled with innovative circuit design techniques, yields
high-performance and low power consumption devices.
When
CE
is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable and
Output Enable inputs,
CE
and
OE.
The active LOW Write Enable
(WE) controls both writing and reading of the memory. A data
byte allows Upper Byte (UB) and Lower Byte (LB) access.
The IS62LV12816L and IS62LV12816LL are packaged in the
JEDEC standard 44-pin TSOP (Type II) and 48-pin mini BGA.
FUNCTIONAL BLOCK DIAGRAM
A0-A16
DECODER
128K x 16
MEMORY ARRAY
VCC
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CE
OE
WE
UB
LB
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.
CONTROL
CIRCUIT
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. C
03/17/00
1
IS62LV12816L/LL
OPERATING RANGE
Range
Commercial
Industrial
Ambient Temperature
0°C to +70°C
–40°C to +85°C
V
CC
2.5V - 3.0V
2.5V - 3.0V
ISSI
®
1
2
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
T
BIAS
V
CC
T
STG
P
T
Parameter
Terminal Voltage with Respect to GND
Temperature Under Bias
Vcc Related to GND
Storage Temperature
Power Dissipation
Value
–0.5 to Vcc+0.5
–40 to +85
–0.3 to +4.0
–65 to +150
1.0
Unit
V
°C
V
°C
W
3
4
5
6
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol
V
OH
V
OL
V
IH
V
IL(1)
I
LI
I
LO
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage
Output Leakage
GND
≤
V
IN
≤
V
CC
GND
≤
V
OUT
≤
V
CC
, Outputs Disabled
Test Conditions
V
CC
= Min., I
OH
= –1 mA
V
CC
= Min., I
OL
= 2.1 mA
Min.
2.0
—
2.2
–0.2
–1
–1
Max.
—
0.4
V
CC
+ 0.2
0.4
1
1
Unit
V
V
V
V
µA
µA
7
8
9
10
Notes:
1. V
IL
(min.) = –2.0V for pulse width less than 10 ns.
CAPACITANCE
(1)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
6
8
Unit
pF
pF
11
12
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. C
03/17/00
3
IS62LV12816L/LL
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
Unit
0.4V to 2.2V
5 ns
1.3V
See Figures 1 and 2
ISSI
®
AC TEST LOADS
3070
Ω
2.8V
2.8V
3070
Ω
OUTPUT
100 pF
Including
jig and
scope
3150
Ω
OUTPUT
5 pF
Including
jig and
scope
3150
Ω
Figure 1
Figure 2
IS62LV12816L POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol Parameter
I
CC
Vcc Dynamic Operating
Supply Current
I
SB
1
TTL Standby Current
(TTL Inputs)
I
SB
2
CMOS Standby
Current (CMOS Inputs)
Test Conditions
V
CC
= Max.,
I
OUT
= 0 mA, f = f
MAX
V
CC
= Max.,
V
IN
= V
IH
or V
IL
CE
≥
V
IH
, f = 0
V
CC
= Max.,
CE
≥
V
CC
– 0.2V,
V
IN
≥
V
CC
– 0.2V, or
V
IN
≤
0.2V, f = 0
-55
Min. Max.
— 40
— 60
— 0.4
— 1.0
—
—
15
15
-70
Min. Max.
— 30
— 50
— 0.4
— 1.0
—
—
15
15
-100
Min. Max.
— 20
— 40
— 0.4
— 1.0
—
—
15
15
Unit
mA
mA
Com.
Ind.
Com.
Ind.
Com.
Ind.
µA
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
IS62LV12816LL POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol Parameter
Vcc Dynamic Operating
I
CC
Supply Current
I
SB
1
TTL Standby Current
(TTL Inputs)
I
SB
2
CMOS Standby
Current (CMOS Inputs)
Test Conditions
V
CC
= Max.,
I
OUT
= 0 mA, f = f
MAX
V
CC
= Max.,
V
IN
= V
IH
or V
IL
CE
≥
V
IH
, f = 0
V
CC
= Max.,
CE
≥
V
CC
– 0.2V,
V
IN
≥
V
CC
– 0.2V, or
V
IN
≤
0.2V, f = 0
-55
Min. Max.
— 40
— 60
— 0.4
— 1.0
—
—
5
5
-70
Min. Max.
— 30
— 50
— 0.4
— 1.0
—
—
5
5
-100
Min. Max.
— 20
— 40
— 0.4
— 1.0
—
—
5
5
Unit
mA
mA
Com.
Ind.
Com.
Ind.
Com.
Ind.
µA
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
4
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. C
03/17/00
IS62LV12816L/LL
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE
Access Time
OE
Access Time
OE
to High-Z Output
OE
to Low-Z Output
CE
to High-Z Output
CE
to Low-Z Output
LB, UB
Access Time
LB, UB
to High-Z Output
LB, UB
to Low-Z Output
(2)
ISSI
-55
Min. Max.
55
—
10
—
—
—
5
0
10
—
0
0
—
55
—
55
30
20
—
20
—
20
25
—
-70
Min. Max.
70
—
10
—
—
—
5
0
10
—
0
0
—
70
—
70
35
25
—
25
—
35
25
—
-100
Min. Max.
100
—
15
—
—
—
5
0
10
—
0
0
—
100
—
100
50
30
—
30
—
50
35
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
®
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
HZOE
(2)
t
LZOE
t
HZCE
(2)
t
LZCE
(2)
t
BA
t
HZB
t
LZB
1
2
3
4
5
6
7
8
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels
of 0.4 to 2.2V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC WAVEFORMS
READ CYCLE NO. 1
(1,2)
(Address Controlled) (CE =
OE
= V
IL
,
UB
or
LB
= V
IL
)
t
RC
ADDRESS
t
AA
t
OHA
t
OHA
DATA VALID
9
10
11
12
D
OUT
PREVIOUS DATA VALID
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. C
03/17/00
5
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