38D5 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
DESCRIPTION
The 38D5 Group is the 8-bit microcomputer based on the 740
Family core technology.
The 38D5 Group is pin-compatible with the 38C5 Group.
The 38D5 Group has an LCD drive control circuit, an A/D
converter, a serial interface, and a ROM correction function as
additional functions.
The QzROM version and the flash memory version are available.
The flash memory version does not have a selection function for
the oscillation start mode. Only the on-chip oscillator starts
oscillating.
The various microcomputers include variations of memory size,
and packaging. For details, refer to the section on part
numbering.
FEATURES
• Basic machine-language instructions ................................. 71
• The minimum instruction execution time ................... 0.32
µs
(at 12.5 MHz oscillation frequency)
• Memory size (QzROM version)
ROM ........................................................ 32 K to 60 K bytes
RAM ......................................................... 1536 to 2048 bytes
• Memory size (Flash memory version)
ROM ...................................................................... 60 K bytes
RAM ...................................................................... 2048 bytes
• Programmable input/output ports .. 59 (common to SEG: 36)
• Interrupts ............................................. 17 sources, 16 vectors
(Key input interrupt included)
• Timers ..................................................... 8-bit × 4, 16-bit × 2
• Serial interface
Serial I/O1 ...............8-bit × 1 (UART or Clock-synchronized)
Serial I/O2 .............................. 8-bit × 1 (Clock-synchronized)
• PWM .......... 10-bit × 2, 16-bit × 1 (common to IGBT output)
• A/D converter .......................................... 10-bit × 8 channels
(A/D converter can be operated in low-speed mode.)
• Watchdog timer ......................................................... 8-bit × 1
• ROM correction function ....................... 32 bytes × 2 vectors
• LED direct drive port ............................................................ 6
(average current: 15 mA, peak current: 30 mA, total current: 90 mA)
• LCD drive control circuit
Bias ............................................................................ 1/2, 1/3
Duty ............................................................... Static, 2, 3, 4, 8
Common output ................................................................. 4/8
Segment output .............................................................. 32/36
• Main clock generating circuit ............................................... 1
(connect to external ceramic resonator or on-chip oscillator)
• Sub-clock generating circuit ..................................................1
(connect to external quartz-crystal oscillator)
REJ03B0158-0301
Rev.3.01
Aug 08, 2007
• Power source voltage (QzROM version)
[In frequency/2 mode]
f(X
IN
)
≤
12.5 MHz.............................................. 4.5 to 5.5 V
f(X
IN
)
≤
8 MHz................................................... 4.0 to 5.5 V
f(X
IN
)
≤
4 MHz................................................... 2.0 to 5.5 V
f(X
IN
)
≤
2 MHz................................................... 1.8 to 5.5 V
[In frequency/4 mode]
f(X
IN
)
≤
16 MHz................................................. 4.5 to 5.5 V
f(X
IN
)
≤
8 MHz................................................... 2.0 to 5.5 V
f(X
IN
)
≤
4 MHz................................................... 1.8 to 5.5 V
[In frequency/8 mode]
f(X
IN
)
≤
16 MHz................................................. 4.5 to 5.5 V
f(X
IN
)
≤
8 MHz................................................... 2.0 to 5.5 V
f(X
IN
)
≤
4 MHz................................................... 1.8 to 5.5 V
[In low-speed mode].............................................. 1.8 to 5.5 V
Note. 12.5 MHz < f(X
IN
)
≤
16 MHz is not available in the fre-
• Power source voltage (Flash memory version)
[In frequency/2 mode]
f(X
IN
)
≤
12.5 MHz.............................................. 4.5 to 5.5 V
f(X
IN
)
≤
8 MHz................................................... 4.0 to 5.5 V
f(X
IN
)
≤
4 MHz................................................... 2.7 to 5.5 V
[In frequency/4 mode]
f(X
IN
)
≤
16 MHz................................................. 4.5 to 5.5 V
f(X
IN
)
≤
8 MHz................................................... 2.7 to 5.5 V
[In frequency/8 mode]
f(X
IN
)
≤
16 MHz................................................. 4.5 to 5.5 V
f(X
IN
)
≤
8 MHz................................................... 2.7 to 5.5 V
[In low-speed mode].............................................. 2.7 to 5.5 V
Note. 12.5 MHz < f(X
IN
)
≤
16 MHz is not available in the fre-
• Power dissipation (QzROM version)
• In frequency/2 mode ..................................... Typ. 32 mW
(V
CC
= 5 V, f(X
IN
) = 12.5 MHz, Ta = 25°C)
• In low-speed mode ........................................ Typ. 18
µW
(V
CC
= 2.5 V, f(X
IN
) = stop, f(X
CIN
) = 32 kHz, Ta = 25°C)
• Power dissipation (Flash memory version)
• In frequency/2 mode ..................................... Typ. 20 mW
(V
CC
= 5 V, f(X
IN
) = 12.5 MHz, Ta = 25°C)
• In low-speed mode ...................................... Typ. 1.1 mW
(V
CC
= 2.7 V, f(X
IN
) = stop, f(X
CIN
) = 32 kHz, Ta = 25°C)
• Operating temperature range ...............................
−20
to 85°C
Flash Memory Mode
• Program/Erase voltage ............................. V
CC
= 2.7 to 5.5 V
• Program method ....................... Programming in unit of byte
• Erase method .................................................... Block erasing
• Program/Erase control by software command
quency/2 mode.
quency/2 mode.
APPLICATION
Household products, Consumer electronics, etc.
Rev.3.01 Aug 08, 2007
REJ03B0158-0301
Page 1 of 134
38D5 Group
Table 1
Performance overview (1)
Parameter
Function
71
0.32
µs
(Minimum instruction, Oscillation frequency 12.5 MHz)
16 MHz (Maximum)
(1)
ROM
RAM
32 K to 60 K bytes
1536 to 2048 bytes
60 K bytes
2048 bytes
2-bit
×
1
8-bit
×
7, 3-bit
×
1 (36 pins sharing SEG)
17 sources, 16 vectors (includes key input interrupt)
8-bit
×
4, 16-bit
×
2
8-bit
×
1 (UART or Clock-synchronized)
8-bit
×
1 (Clock-synchronized)
10-bit
×
2, 16-bit
×
1 (common to IGBT output)
10-bit
×
8 (operated in low-speed mode)
8-bit
×
1
32 bytes
×
2 vectors
6 (average current: 15 mA, peak current: 30 mA, total current: 90 mA)
Bias
Duty
Common output
Segment output
1/2, 1/3
2, 3, 4, 8
4/8
32/36
Built-in (connect to external ceramic resonator or on-chip oscillator)
Built-in (connect to external quartz-crystal oscillator)
f(X
IN
)
≤
12.5 MHz 4.5 to 5.5 V
f(X
IN
)
≤
8 MHz
f(X
IN
)
≤
4 MHz
f(X
IN
)
≤
2 MHz
In frequency/4 mode
f(X
IN
)
≤
16 MHz
f(X
IN
)
≤
8 MHz
f(X
IN
)
≤
4 MHz
In frequency/8 mode
f(X
IN
)
≤
16 MHz
f(X
IN
)
≤
8 MHz
f(X
IN
)
≤
4 MHz
In low-speed mode
4.0 to 5.5 V
2.0 to 5.5 V
1.8 to 5.5 V
4.5 to 5.5 V
2.0 to 5.5 V
1.8 to 5.5 V
4.5 to 5.5 V
2.0 to 5.5 V
1.8 to 5.5 V
1.8 to 5.5 V
f(X
IN
)
≤
12.5 MHz 4.5 to 5.5 V
f(X
IN
)
≤
8 MHz
f(X
IN
)
≤
4 MHz
In frequency/4 mode
In frequency/8 mode
In low-speed mode
f(X
IN
)
≤
16 MHz
f(X
IN
)
≤
8 MHz
f(X
IN
)
≤
16 MHz
f(X
IN
)
≤
8 MHz
4.0 to 5.5 V
2.7 to 5.5 V
4.5 to 5.5 V
2.7 to 5.5 V
4.5 to 5.5 V
2.7 to 5.5 V
2.7 to 5.5 V
Number of basic instructions
Instruction execution time
Oscillation frequency
Memory sizes
(QzROM version)
ROM
Memory sizes
(Flash memory version) RAM
Input port
I/O port
Interrupt
Timer
Serial I/O1
Serial I/O2
PWM
A/D converter
Watchdog timer
ROM correction function
LED direct drive port
LCD drive control
circuit
P7
0
, P7
1
P0-P6, P7
2
-P7
4
Main clock generating circuits
Sub-clock generating circuits
Power source voltage
(QzROM version)
In frequency/2 mode
(1)
Power source voltage In frequency/2 mode
(Flash memory version)
(1)
NOTE:
1. 12.5 MHz < f(X
IN
)
≤
16 MHz is not available in the frequency/2 mode.
Rev.3.01 Aug 08, 2007
REJ03B0158-0301
Page 4 of 134
ADI Reference Circuit
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