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PI74FCT162500ATV

Description
Registered Bus Transceiver, FCT Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.300 INCH, PLASTIC, SSOP-56
Categorylogic    logic   
File Size62KB,6 Pages
ManufacturerPericom Semiconductor Corporation (Diodes Incorporated)
Websitehttps://www.diodes.com/
Download Datasheet Parametric View All

PI74FCT162500ATV Overview

Registered Bus Transceiver, FCT Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.300 INCH, PLASTIC, SSOP-56

PI74FCT162500ATV Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeSSOP
package instructionSSOP, SSOP56,.4
Contacts56
Reach Compliance Codeunknown
ECCN codeEAR99
Other featuresWITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
Control typeINDEPENDENT CONTROL
Counting directionBIDIRECTIONAL
seriesFCT
JESD-30 codeR-PDSO-G56
JESD-609 codee0
length18.415 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeREGISTERED BUS TRANSCEIVER
MaximumI(ol)0.024 A
Number of digits18
Number of functions1
Number of ports2
Number of terminals56
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE WITH SERIES RESISTOR
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Encapsulate equivalent codeSSOP56,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Prop。Delay @ Nom-Sup5.1 ns
propagation delay (tpd)5.6 ns
Certification statusNot Qualified
Maximum seat height2.74 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
translateN/A
Trigger typeNEGATIVE EDGE
width7.5 mm
Base Number Matches1
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16500/162500T
18-BIT REGISTERED TRANSCEIVERS
PI74FCT16500T
PI74FCT162500T
Fast CMOS 18-Bit
Registered Transceivers
Product Description:
Product Features:
Common Features:5
• PI74FCT16500T and PI74FCT162500T are high-speed,
low power devices with high current drive.
• V
CC
= 5V ±10%
• Hysteresis on all inputs
• Packages available:
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 300 mil wide plastic SSOP (V)
PI74FCT16500T Features:
• High output drive: I
OH
= –32 mA; I
OL
= 64 mA
• Power off disable outputs permit “live insertion”
• Typical V
OLP
(Output Ground Bounce) < 1.0V
at V
CC
= 5V, T
A
= 25°C
PI74FCT162500T Features:
• Balanced output drivers: ±24 mA
• Reduced system switching noise
• Typical V
OLP
(Output Ground Bounce) < 0.6V
at V
CC
= 5V, T
A
= 25°C
Pericom Semiconductor’s PI74FCT series of logic circuits are pro-
duced in the Company’s advanced 0.8 micron CMOS technology,
achieving industry leading speed grades.
The PI74FCT16500T and PI74FCT162500T are 18-bit registered bus
transceivers designed with D-type latches and flip-flops to allow
data flow in transparent, latched, and clocked modes. The Output
Enable (OEAB and OEBA), Latch Enable (LEAB and LEBA) and
Clock (CLKAB and CLKBA) inputs control the data flow in each
direction. When LEAB is HIGH, the device operates in transparent
mode for A-to-B data flow. When LEAB is LOW, the A data is latched
if CLKAB is held at a HIGH or LOW logic level. The A bus data is
stored in the latch/flip-flop on the HIGH-to-LOW transition of
CLKAB, if LEAB is LOW. OEAB performs the output enable
function on the B port. Data flow from B port to A port is similar using
OEBA, LEBA and CLKBA. These high-speed, low power devices
offer a flow-through organization for ease of board layout.
The PI74FCT16500T output buffers are designed with a Power-Off
disable allowing “live insertion” of boards when used as backplane
drivers.
The PI74FCT162500T has ±24 mA balanced output drivers. It is
designed with current limiting resistors at its outputs to control the
output edge rate resulting in lower ground bounce and undershoot.
This eliminates the need for external terminating resistors for most
interface applications.
Logic Block Diagram
OEAB
CLKBA
LEBA
OEBA
CLKAB
LEAB
C
A
1
D
C
B
1
D
C
D
C
D
TO 17 OTHER CHANNELS
1
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