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KV1932-154-4

Description
Variable Capacitance Diode, Ultra High Frequency, 8V, Silicon, Hyperabrupt
CategoryDiscrete semiconductor    diode   
File Size164KB,2 Pages
ManufacturerMicrosemi
Websitehttps://www.microsemi.com
Download Datasheet Parametric View All

KV1932-154-4 Overview

Variable Capacitance Diode, Ultra High Frequency, 8V, Silicon, Hyperabrupt

KV1932-154-4 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
package instructionR-PDSO-G3
Reach Compliance Codeunknown
ECCN codeEAR99
Other featuresHIGH RELIABILITY
Minimum breakdown voltage8 V
ConfigurationCOMMON CATHODE, 2 ELEMENTS
Diode Capacitance Tolerance21.21%
Diode component materialsSILICON
Diode typeVARIABLE CAPACITANCE DIODE
frequency bandULTRA HIGH FREQUENCY
JESD-30 codeR-PDSO-G3
JESD-609 codee0
Number of components2
Number of terminals3
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Maximum power dissipation0.25 W
Certification statusNot Qualified
minimum quality factor350
surface mountYES
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Varactor Diode ClassificationHYPERABRUPT
Base Number Matches1
How do applications and drivers dynamically transfer data?
Definition: #define IO_OPEN_COM CTL_CODE(FILE_DEVICE_COMSPY,0x080A,METHOD_BUFFERED, \ FILE_ANY_ACCESS) I want to use the following to pass the serial port number "\\??\\COM1" DeviceIoControl(m_hDevice...
fewcome Embedded System
Please correct any Verilog syntax errors!
`timescale 100ps/100psmodule buffer_blocking (out, in);input in;output out;parameter DELAY1 = 103;parameter DELAY2 = 103;always @(in)#DELAY1 out = #DELAY2 in;//这个地方报错,(vlog-2110) Illegal reference to ...
eeleader FPGA/CPLD
Moderator is silent?
Why is the moderator silent? I am very interested in this product!...
superdianzifans DIY/Open Source Hardware
MSP430 ADC12
Curr_Volt = caltmp >> 12; //Curr_Volt = caltmp / 2^n [b] ptr[0] = Curr_Volt / 100; //Hex->Dec conversion t1 = Curr_Volt - (ptr[0] * 100); ptr[2] = t1 / 10; ptr[3] = t1 - (ptr[2] * 10); ptr[1] = 10; //...
zhoupinhua Microcontroller MCU
【FPGA Design Question】About Timing and Combinational Logic
module reg4(clk,rstn,d,q);input [3:0] d;input clk;input rstn;output [3:0] q;reg [3:0] q; always @(rstn or clk)q...
eeleader FPGA/CPLD
I have an idea about English materials
According to some thoughts of xiaoxif in the MCU section, [color=blue]on the 26th floor[/color], [url=https://bbs.eeworld.com.cn/thread-87805-3-1.html]https://bbs.eeworld.com.cn/thread-87805-3-1.html[...
小娜 Analog electronics

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