RH80532GC029512 datasheet, PDF

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> RH80532GC029512

RH80532GC029512: DescriptionMicroprocessor, 32-Bit, 1700MHz, CMOS, CPGA478, MICRO, FCPGA-478; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，97 Pages; ManufacturerIntel; Websitehttp://www.intel.com/; Environmental Compliance

Download Datasheet Parametric Compare View All

RH80532GC029512 Overview

Microprocessor, 32-Bit, 1700MHz, CMOS, CPGA478, MICRO, FCPGA-478

RH80532GC029512 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Parts packaging code	PGA
package instruction	SPGA, PGA478,26X26,50
Contacts	478
Reach Compliance Code	unknown
ECCN code	3A001.A.3
Address bus width	36
bit size	32
boundary scan	YES
maximum clock frequency	100 MHz
External data bus width	64
Format	FLOATING POINT
Integrated cache	YES
JESD-30 code	S-CPGA-P478
length	35 mm
low power mode	YES
Number of terminals	478
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	SPGA
Encapsulate equivalent code	PGA478,26X26,50
Package shape	SQUARE
Package form	GRID ARRAY, SHRINK PITCH
power supply	1.3 V
Certification status	Not Qualified
Maximum seat height	3.28 mm
speed	1700 MHz
Maximum slew rate	29900 mA
Nominal supply voltage	1.3 V
surface mount	NO
technology	CMOS
Terminal form	PIN/PEG
Terminal pitch	1.27 mm
Terminal location	PERPENDICULAR
width	35 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR
Base Number Matches	1

Preview

Download Datasheet

View All

Mobile Intel



Pentium



Processor-M

Datasheet

June 2003

Order Number: 250686-007

Information in this document is provided solely to enable use of Intel products. Intel assumes no liability whatsoever, including

infringement of any patent or copyright, for sale and use of Intel products except as provided in Intel's Terms and Conditions of Sale

for such products. Information contained herein supersedes previously published specifications on these devices from Intel.

Actual system-level properties, such as skin temperature, are a function of various factors, including component placement,

component power characteristics, system power and thermal management techniques, software application usage and general

system design. Intel is not responsible for its customers' system designs, nor is Intel responsible for ensuring that its customers'

products comply with all applicable laws and regulations. Intel provides this and other thermal design information for informational

purposes only. System design is the sole responsibility of Intel's customers, and Intel's customers should not rely on any Intel-

provided information as either an endorsement or recommendation of any particular system design characteristics.

Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise,

to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such

products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of

Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any

patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining

applications.

Intel may make changes to specifications and product descriptions at any time, without notice.

Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel

reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future

changes to them.

The Mobile Intel Pentium 4 Processor-M may contain design defects or errors known as errata which may cause the product to

deviate from published specifications. Current characterized errata are available on request.

Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.

Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be

obtained by calling 1-800-548-4725 or by visiting Intel’s Website at http://www.intel.com

Intel, Pentium, Intel NetBurst, and SpeedStep are registered trademarks or trademarks of Intel Corporation and its subsidiaries in

the United States and other countries.

* Other brands and names are the property of their respective owners.

Mobile Intel



Pentium



4 Processor-M Datasheet

Contents

Introduction......................................................................................................................... 9

1.1

1.2

2.1

2.2

2.3

Terminology......................................................................................................... 11

References .......................................................................................................... 11

System Bus and GTLREF ................................................................................... 13

Power and Ground Pins ...................................................................................... 13

Decoupling Guidelines ........................................................................................ 13

2.3.1 VCC Decoupling ..................................................................................... 14

2.3.2 System Bus AGTL+ Decoupling............................................................. 14

2.3.3 System Bus Clock (BCLK[1:0]) and Processor Clocking .......................14

Voltage Identification and Power Sequencing..................................................... 15

2.4.1 Enhanced Intel® SpeedStep® Technology............................................ 16

2.4.2 Phase Lock Loop (PLL) Power and Filter............................................... 17

2.4.3 Catastrophic Thermal Protection............................................................ 18

Signal Terminations, Unused Pins and TESTHI[10:0] ........................................ 18

System Bus Signal Groups ................................................................................. 20

Asynchronous GTL+ Signals............................................................................... 22

Test Access Port (TAP) Connection.................................................................... 22

System Bus Frequency Select Signals (BSEL[1:0])............................................ 22

Maximum Ratings................................................................................................ 23

Processor DC Specifications............................................................................... 23

AGTL+ System Bus Specifications ..................................................................... 34

System Bus AC Specifications ............................................................................ 35

Processor AC Timing Waveforms ....................................................................... 40

System Bus Clock (BCLK) Signal Quality Specifications and Measurement

Guidelines ...........................................................................................................51

System Bus Signal Quality Specifications and Measurement Guidelines........... 52

System Bus Signal Quality Specifications and Measurement Guidelines........... 55

3.3.1 Overshoot/Undershoot Guidelines ......................................................... 55

3.3.2 Overshoot/Undershoot Magnitude ......................................................... 55

3.3.3 Overshoot/Undershoot Pulse Duration................................................... 55

3.3.4 Activity Factor......................................................................................... 56

3.3.5 Reading Overshoot/Undershoot Specification Tables............................ 56

3.3.6 Conformance Determination to Overshoot/Undershoot Specifications .. 57

Processor Pin-Out ............................................................................................... 64

Mobile Intel Pentium 4 Processor-M Pin Assignments........................................ 67

Alphabetical Signals Reference .......................................................................... 81

Thermal Specifications ........................................................................................ 90

Electrical Specifications.................................................................................................... 13

2.4

2.5

2.6

2.7

2.8

2.9

2.10

2.11

2.12

2.13

2.14

3.1

3.2

3.3

System Bus Signal Quality Specifications........................................................................ 51

Package Mechanical Specifications .................................................................................61

4.1

5.1

5.2

Pin Listing and Signal Definitions .....................................................................................67

Thermal Specifications and Design Considerations......................................................... 89

6.1

Mobile Intel



Pentium



4 Processor-M Datasheet

Figures

VCCVID Pin Voltage and Current Requirements ................................................ 15

Typical VCCIOPLL, VCCA and VSSA Power Distribution .................................. 17

Phase Lock Loop (PLL) Filter Requirements ..................................................... 18

Illustration of VCC Static and Transient Tolerances (VID = 1.30 V).................... 26

Illustration of VCC Static and Transient Tolerances (VID = 1.20 V).................... 28

Illustration of Deep Sleep VCC Static and Transient Tolerances (VID

Setting = 1.30 V) ................................................................................................. 29

ITPCLKOUT[1:0] Output Buffer Diagram ............................................................ 34

AC Test Circuit .................................................................................................... 41

TCK Clock Waveform.......................................................................................... 41

Differential Clock Waveform................................................................................ 42

Differential Clock Crosspoint Specification.......................................................... 43

System Bus Common Clock Valid Delay Timings............................................... 43

System Bus Reset and Configuration Timings....................................................44

Source Synchronous 2X (Address) Timings ....................................................... 44

Source Synchronous 4X Timings ........................................................................ 45

Power Up Sequence ........................................................................................... 46

Power Down Sequence....................................................................................... 46

Test Reset Timings ............................................................................................. 47

THERMTRIP# to Vcc Timing............................................................................... 47

FERR#/PBE# Valid Delay Timing ....................................................................... 47

TAP Valid Delay Timing ...................................................................................... 48

ITPCLKOUT Valid Delay Timing ......................................................................... 48

Stop Grant/Sleep/Deep Sleep Timing .................................................................49

Enhanced Intel SpeedStep Technology/Deep Sleep Timing .............................. 50

BCLK Signal Integrity Waveform......................................................................... 52

Low-to-High System Bus Receiver Ringback Tolerance..................................... 53

High-to-Low System Bus Receiver Ringback Tolerance..................................... 53

Low-to-High System Bus Receiver Ringback Tolerance for PWRGOOD and TAP

Buffers ................................................................................................................. 54

High-to-Low System Bus Receiver Ringback Tolerance for PWRGOOD and TAP

Buffers ................................................................................................................. 54

Maximum Acceptable Overshoot/Undershoot Waveform ................................... 59

Micro-FCPGA Package Top and Bottom Isometric Views .................................. 61

Micro-FCPGA Package Top and Side View........................................................ 62

Micro-FCPGA Package - Bottom View................................................................ 64

The Coordinates of the Processor Pins as Viewed From the Top of the

Package. ............................................................................................................. 65

Clock Control States............................................................................................ 94

Mobile Intel



Pentium



4 Processor-M Datasheet

RH80532GC029512 Related Products

	RH80532GC029512	RH80532GC049512
Description	Microprocessor, 32-Bit, 1700MHz, CMOS, CPGA478, MICRO, FCPGA-478	Microprocessor, 32-Bit, 2200MHz, CMOS, PBGA478, PLASTIC, UFCPGA-478
Is it Rohs certified?	conform to	conform to
Parts packaging code	PGA	PGA
package instruction	SPGA, PGA478,26X26,50	PGA, PGA478,26X26,50
Contacts	478	478
Reach Compliance Code	unknown	unknown
ECCN code	3A001.A.3	3A001.A.3
Address bus width	36	33
bit size	32	32
boundary scan	YES	YES
maximum clock frequency	100 MHz	400 MHz
External data bus width	64	64
Format	FLOATING POINT	FLOATING POINT
Integrated cache	YES	YES
JESD-30 code	S-CPGA-P478	S-PBGA-P478
length	35 mm	35 mm
low power mode	YES	YES
Number of terminals	478	478
Package body material	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY
encapsulated code	SPGA	PGA
Encapsulate equivalent code	PGA478,26X26,50	PGA478,26X26,50
Package shape	SQUARE	SQUARE
Package form	GRID ARRAY, SHRINK PITCH	GRID ARRAY
power supply	1.3 V	1.3 V
Certification status	Not Qualified	Not Qualified
speed	1700 MHz	2200 MHz
Maximum slew rate	29900 mA	34500 mA
Nominal supply voltage	1.3 V	1.3 V
surface mount	NO	NO
technology	CMOS	CMOS
Terminal form	PIN/PEG	PIN/PEG
Terminal pitch	1.27 mm	1.27 mm
Terminal location	PERPENDICULAR	BOTTOM
width	35 mm	35 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR	MICROPROCESSOR

Recommended Resources

Massager digital tube display circuit

Current reduction protection voltage regulator circuit

Mine dust removal delay photoelectric controller circuit

Six-position mutual reset hand touch switch circuit

One card multiple numbers card reader circuit schematic diagram

TDA1520A integrated circuit power amplifier

How to obtain the total capacity and available capacity of SD under Win CE?: How to obtain the total capacity and available capacity of SD under Win CE?...; 今天不工作 Embedded System

Msp430launchpad upgraded version board application: Development board application...; 董宝君 Microcontroller MCU

How do you access Google Search?: Is Google indispensable for RD? Is there a way to legally access Google search? Is access to Google provided by the company or do you have to find a way yourself?...; littleshrimp Integrated technical exchanges

An Easy Introduction to C Language for Microcontrollers (Book) [Recommended Collection]: [size=9pt] [table=98%][tr][td][font=宋体][size=3]Chapter 1 Overview of C Language and Establishment of Development Environment Chapter 2 Branch Programming Chapter 3 Data Types Chapter 4 Loop Programmin...; gnkjmcu MCU

Can the power supply made of 7805 replace the negative power supply?: I would like to ask you a question, can the power supply made with 7805 be used to replace the negative power supply? Thank you!...; 花儿 Analog electronics

Input 0-4V, output 0V; input 4-10V, output 0-5V: I need help from an expert on analog circuits. I want the input DC voltage to be 0-10V and the output to be 0-10V, but the output will only start when the input is at a certain voltage. For example, w...; zhfub Analog electronics

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components