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71V547S80PFG

Description
TQFP-100, Tray
Categorystorage    storage   
File Size270KB,21 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
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71V547S80PFG Overview

TQFP-100, Tray

71V547S80PFG Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeTQFP
package instructionQFF, QFP100,.63X.87
Contacts100
Manufacturer packaging codePKG100
Reach Compliance Codecompliant
ECCN code3A991.B.2.A
Maximum access time5 ns
Other featuresFLOW-THROUGH
Maximum clock frequency (fCLK)95 MHz
I/O typeCOMMON
JESD-30 codeR-PQFP-F100
JESD-609 codee3
memory density4718592 bit
Memory IC TypeZBT SRAM
memory width36
Humidity sensitivity level3
Number of functions1
Number of terminals100
word count131072 words
character code128000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize128KX36
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeQFF
Encapsulate equivalent codeQFP100,.63X.87
Package shapeRECTANGULAR
Package formFLATPACK
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Certification statusNot Qualified
Maximum standby current0.04 A
Minimum standby current3.14 V
Maximum slew rate0.25 mA
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formFLAT
Terminal pitch0.635 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
Base Number Matches1
128K X 36, 3.3V Synchronous
SRAM with ZBT™ Feature, Burst
Counter and Flow-Through Outputs
Features
71V547S
128K x 36 memory configuration, flow-through outputs
Supports high performance system speed - 95 MHz
(8ns Clock-to-Data Access)
ZBT
TM
Feature - No dead cycles between write and read
cycles
Internally synchronized signal eliminates the need to
control
OE
Single R/W (READ/WRITE) control pin
4-word burst capability (Interleaved or linear)
Individual byte write (BW
1
-
BW
4
) control (May tie active)
Three chip enables for simple depth expansion
Single 3.3V power supply (±5%)
Packaged in a JEDEC standard 100-pin TQFP package
Functional Block Diagram
LBO
Address A [0:16]
CE1,
CE2,
CE2
R/W
CEN
ADV/LD
BWx
Input Register
128K x 36 BIT
MEMORY ARRAY
D
Q
Address
D
Q
Control
DI
DO
D
Clk
Q
Control Logic
Mux
Clock
Sel
OE
Gate
,
Data I/O [0:31], I/O P[1:4]
3822 drw 01
ZBT and Zero Bus Turnaround are trademarks of Renesas and the architecture is supported by Micron Technology and Motorola Inc.
1
Apr.24.20

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Description TQFP-100, Tray TQFP-100, Reel TQFP-100, Tray TQFP-100, Tray TQFP-100, Reel
Brand Name Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology
Is it lead-free? Lead free Lead free Lead free Lead free Lead free
Is it Rohs certified? conform to conform to conform to conform to conform to
Parts packaging code TQFP TQFP TQFP TQFP TQFP
package instruction QFF, QFP100,.63X.87 QFF, QFP100,.63X.87 QFF, QFP100,.63X.87 QFF, QFP100,.63X.87 QFF, QFP100,.63X.87
Contacts 100 100 100 100 100
Manufacturer packaging code PKG100 PKG100 PKG100 PKG100 PKG100
Reach Compliance Code compliant compliant compliant compliant compliant
ECCN code 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A
Maximum access time 5 ns 5 ns 5 ns 5 ns 5 ns
Other features FLOW-THROUGH FLOW-THROUGH FLOW-THROUGH FLOW-THROUGH FLOW-THROUGH
Maximum clock frequency (fCLK) 95 MHz 66 MHz 66 MHz 66 MHz 95 MHz
I/O type COMMON COMMON COMMON COMMON COMMON
JESD-30 code R-PQFP-F100 R-PQFP-F100 R-PQFP-F100 R-PQFP-F100 R-PQFP-F100
JESD-609 code e3 e3 e3 e3 e3
memory density 4718592 bit 4718592 bit 4718592 bit 4718592 bit 4718592 bit
Memory IC Type ZBT SRAM ZBT SRAM ZBT SRAM ZBT SRAM ZBT SRAM
memory width 36 36 36 36 36
Humidity sensitivity level 3 3 3 3 3
Number of functions 1 1 1 1 1
Number of terminals 100 100 100 100 100
word count 131072 words 131072 words 131072 words 131072 words 131072 words
character code 128000 128000 128000 128000 128000
Operating mode SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 70 °C 85 °C 70 °C 85 °C 70 °C
organize 128KX36 128KX36 128KX36 128KX36 128KX36
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code QFF QFF QFF QFF QFF
Encapsulate equivalent code QFP100,.63X.87 QFP100,.63X.87 QFP100,.63X.87 QFP100,.63X.87 QFP100,.63X.87
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form FLATPACK FLATPACK FLATPACK FLATPACK FLATPACK
Parallel/Serial PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
Peak Reflow Temperature (Celsius) 260 260 260 260 260
power supply 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum standby current 0.04 A 0.045 A 0.04 A 0.045 A 0.04 A
Minimum standby current 3.14 V 3.14 V 3.14 V 3.14 V 3.14 V
Maximum slew rate 0.25 mA 0.21 mA 0.2 mA 0.21 mA 0.25 mA
Maximum supply voltage (Vsup) 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V
Minimum supply voltage (Vsup) 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL INDUSTRIAL COMMERCIAL INDUSTRIAL COMMERCIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed
Terminal form FLAT FLAT FLAT FLAT FLAT
Terminal pitch 0.635 mm 0.635 mm 0.635 mm 0.635 mm 0.635 mm
Terminal location QUAD QUAD QUAD QUAD QUAD
Maximum time at peak reflow temperature 30 30 30 30 30
Base Number Matches 1 1 1 1 1
Maker - IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) -
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