M28F201
2 Mb (256K x 8, Chip Erase) FLASH MEMORY
5V
±
10% SUPPLY VOLTAGE
12V PROGRAMMING VOLTAGE
FAST ACCESS TIME: 70ns
BYTE PROGRAMMING TIME: 10µs typical
ELECTRICAL CHIP ERASE in 1s RANGE
LOW POWER CONSUMPTION
– Active Current: 15mA typical
– Stand-by Current: 10µA typical
10,000 PROGRAM/ERASE CYCLES
INTEGRATED ERASE/PROGRAM-STOP
TIMER
OTP COMPATIBLE PACKAGES and PINOUTS
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Device Code: F4h
DESCRIPTION
The M28F201 FLASH Memory product is a non-
volatile memories which may be erased electrically
at the chip level and programmed byte-by-byte. It
is organised as 256K bytes. It uses a command
register architecture to select the operating modes
and thus provide a simple microprocessor inter-
face. The M28F201 FLASH Memory product is
suitable for applications where the memory has to
be reprogrammed in the equipment. The access
time of 70ns makes the device suitable for use in
high speed microprocessor systems.
PLCC32 (K)
TSOP32 (N)
8 x 20 mm
Figure 1. Logic Diagram
VCC
VPP
18
A0-A17
8
DQ0-DQ7
W
E
M28F201
Table 1. Signal Names
A0-A17
DQ0-DQ7
E
G
W
V
PP
V
CC
V
SS
April 1997
Address Inputs
Data Inputs / Outputs
Chip Enable
Output Enable
Write Enable
Program Supply
Supply Voltage
Ground
G
VSS
AI00637C
1/21
M28F201
Figure 2A. LCC Pin Connections
Figure 2B. TSOP Pin Connections
1 32
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
A14
A13
A8
A9
A11
G
A10
E
DQ7
9
M28F201
25
17
DQ1
DQ2
VSS
DQ3
DQ4
DQ5
DQ6
AI00638C
A11
A9
A8
A13
A14
A17
W
VCC
VPP
A16
A15
A12
A7
A6
A5
A4
A12
A15
A16
VPP
VCC
W
A17
1
32
8
9
M28F201
(Normal)
25
24
16
17
AI00639C
G
A10
E
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3
Figure 2C. TSOP Reverse Pin Connections
G
A10
E
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3
1
32
8
9
M28F201
(Reverse)
25
24
16
17
AI00640D
A11
A9
A8
A13
A14
A17
W
VCC
VPP
A16
A15
A12
A7
A6
A5
A4
DEVICE OPERATION
The M28F201 FLASH Memory product employs a
technology similar to a 2 Megabit EPROM but add
to the device functionality by providing electrical
erasure and programming. These functions are
managed by a command register. The functions
that are addressed via the command register de-
pend on the voltage applied to the V
PP
, program
voltage, input. When V
PP
is less than or equal to
6.5V, the command register is disabled and the
M28F201 functions as a read only memory provid-
ing operating modes similar to an EPROM (Read,
Output Disable, Electronic Signature Read and
Standby). When V
PP
is raised to 12V the command
register is enabled and this provides, in addition,
Erase and Program operations.
READ ONLY MODES, V
PP
≤
6.5V
For all Read Only Modes, except Standby Mode,
the Write Enable input W should be High. In the
Standby Mode this input is ’don’t care’.
Read Mode.
The M28F201 has two enable inputs,
E and G, both of which must be Low in order to
output data from the memory. The Chip Enable (E)
is the power control and should be used for device
selection. Output Enable (G) is the output control
and should be used to gate data on to the output,
independantof the device selection.
2/21
M28F201
Table 2. Absolute Maximum Ratings
Symbol
T
A
T
STG
V
IO
V
CC
V
A9
V
PP
Parameter
Ambient Operating Temperature
Storage Temperature
Input or Output Voltages
Supply Voltage
A9 Voltage
Program Supply Voltage, during Erase
or Programming
Value
–40 to 125
–65 to 150
–0.6 to 7
–0.6 to 7
–0.6 to 13.5
–0.6 to 14
Unit
°C
°C
V
V
V
V
Note:
Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above
those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended
periods may affect device reliability. Refer also to the SGS-THOMSON SURE Program and other relevant quality documents.
Table 3. Operations
V
PP
(1)
Operation
Read
E
V
IL
V
IL
V
IH
V
IL
V
IL
V
IL
V
IL
V
IH
G
V
IL
V
IH
X
V
IL
V
IL
V
IH
V
IH
X
W
V
IH
V
IH
X
V
IH
V
IH
V
IL
Pulse
V
IH
X
A9
A9
X
X
V
ID
A9
A9
X
X
DQ0 - DQ7
Data Output
Hi-Z
Hi-Z
Codes
Data Output
Data Input
Hi-Z
Hi-Z
Read Only
V
PPL
Output Disable
Standby
Electronic Signature
Read
Read/Write
(2)
V
PPH
Write
Output Disable
Standby
Notes:
1. X = V
IL
or V
IH
.
2. Refer also to the Command table.
Table 4. Electronic Signature
Identifier
Manufacturer’s Code
Device Code
A0
V
IL
V
IH
DQ7
0
1
DQ6
0
1
DQ5
1
1
DQ4
0
1
DQ3
0
0
DQ2
0
1
DQ1
0
0
DQ0
0
0
Hex Data
20h
F4h
3/21
M28F201
Table 5. Commands
(1)
Command
Read
Electronic
(2)
Signature
Setup Erase/
Erase
Erase Verify
Setup Program/
Program
Program Verify
Reset
2
2
Write
Write
X
X
C0h
FFh
2
2
Write
Write
A0-A17
X
A0h
40h
Write
Read
Write
A0-A17
X
X
Data Input
Data Output
FFh
Cycles
Operation
1
2
Write
Write
Write
1st Cycle
A0-A17
X
X
X
DQ0-DQ7
00h
80h or 90h
20h
Write
Read
X
X
20h
Data Output
Read
Read
2
00000h
00001h
20h
F4h
Operation
2nd Cycle
A0-A17
DQ0-DQ7
Notes:
1. X = V
IL
or V
IH
.
2. Refer also to the Electronic Signature table.
Standby Mode.
In the Standby Mode the maxi-
mum supply current is reduced. The device is
placed in the Standby Mode by applying a High
level to the Chip Enable (E) input. When in the
Standby Mode the outputs are in a high impedance
state, independant of the Output Enable (G) input.
Output Disable Mode.
When the Output Enable
(G) is High the outputs are in a high impedance
state.
Electronic Signature Mode.
This mode allows the
read out of two binary codes from the device which
identify the manufacturer and device type. This
mode is intended for use by programming equip-
ment to automatically select the correct erase and
programming algorithms. The Electronic Signature
Mode is active when a high voltage (11.5V to 13V)
is applied to address line A9 with E and G Low. With
A0 Low the output data is the manufacturer code,
when A0 is High the output is the device code. All
other address lines should be maintained Low
while reading the codes. The electronic signature
can also be accessed in Read/Write modes.
READ/WRITE MODES, 11.4V
≤
V
PP
≤
12.6V
When V
PP
is High both read and write operations
may be performed. These are defined by the con-
tents of an internal command register. Commands
may be written to this register to set-up and exe-
cute, Erase, Erase Verify, Program, Program Verify
and Reset modes. Each of these modes needs 2
cycles. Each mode starts with a write operation to
set-up the command, this is followed by either read
or write operations. The device expects the first
cycle to be a write operation and does not corrupt
4/21
data at any location in the memory. Read mode is
set-up with one cycle only and may be followed by
any number of read operations to output data.
Electronic Signature Read mode is set-up with one
cycle and followed by a read cycle to output the
manufacturer or device codes.
Awrite to the command register is made by bringing
W Low while E is Low. The falling edge of W latches
Addresses, while the rising edge latches Data,
which are used for those commands that require
address inputs, command input or provide data
output. The supply voltage V
CC
and the program
voltage V
PP
can be applied in any order. When the
device is powered up or when V
PP
is
≤
6.5V the
contents of the command register defaults to 00h,
thus automatically setting-up Read operations. In
addition a specific command may be used to set
the command register to 00h for reading the mem-
ory. The system designer may chose to provide a
constant high V
PP
and use the register commands
for all operations, or to switch the V
PP
from low to
high only when needing to erase or program the
memory. All command register access is inhibited
when V
CC
falls below the Erase/Write Lockout Volt-
age (V
LKO
) of 2.5V.
If the device is deselected during Erasure, Pro-
gramming or verifying it will draw active supply
currents until the operations are terminated.
The device is protected against stress caused by
long erase or program times. If the end of Erase or
Programming operations are not terminated by a
Verify cycle within a maximum time permitted, an
internal stop timer automatically stops the opera-
tion. The device remains in an inactive state, ready
to start a Verify or Reset Mode operation.
M28F201
Table 6. AC Measurement Conditions
SRAM Interface Levels
Input Rise and Fall Times
Input Pulse Voltages
Input and Output Timing Ref. Voltages
≤
10ns
0 to 3V
1.5V
EPROM Interface Levels
≤
10ns
0.45V to 2.4V
0.8V and 2V
Figure 3. AC Testing Input Output Waveform
Figure 4. AC Testing Load Circuit
1.3V
SRAM Interface
3V
1.5V
0V
DEVICE
UNDER
TEST
2.0V
0.8V
AI01275
1N914
3.3kΩ
EPROM Interface
2.4V
OUT
CL = 30pF or 100pF
0.45V
CL = 30pF for SRAM Interface
CL = 100pF for EPROM Interface
CL includes JIG capacitance
AI01276
Table 7. Capacitance
(1)
(T
A
= 25
°C,
f = 1 MHz )
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Test Condition
V
IN
= 0V
V
OUT
= 0V
Min
Max
6
12
Unit
pF
pF
Note:
1. Sampled only, not 100% tested.
Read Mode.
The Read Mode is the default at
power up or may be set-up by writing 00h to the
command register. Subsequent read operations
output data from the memory. The memory remains
in the Read Mode until a new command is written
to the command register.
Electronic Signature Mode.
In order to select the
correct erase and programming algorithms for on-
board programming, the manufacturer and device
codes may be read directly. It is not neccessary to
apply a high voltage to A9 when using the com-
mand register. The Electronic Signature Mode is
set-up by writing 80h or 90h to the command
register. The following read cycles, with address
inputs 00000h or 00001h, output the manufacturer
or device codes. The command is terminated by
writing another valid command to the command
register (for example Reset).
5/21
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