P4C198/198L, P4C198A/198AL
P4C198/P4C198L, P4C198A/P4C198AL
ULTRA HIGH SPEED 16K x 4
STATIC CMOS RAMS
FEATURES
Full CMOS, 6T Cell
High Speed (Equal Access and Cycle Times)
– 10/12/15/20/25 ns (Commercial)
– 12/15/20/25/35 ns (Industrial)
– 15/20/25/35/45 ns (Military)
Low Power Operation (Commercial/Military)
– 715 mW Active – 12/15
– 550/660 mW Active – 20/25/35/45/55
– 193/220 mW Standby (TTL Input)
– 83/110 mW Standby (CMOS Input) P4C198/198A
– 9 mW Standby (CMOS Input)
P4C198L/198AL (Military)
5V
±
10% Power Supply
Data Retention, 10
µA
Typical Current from 2.0V
P4C198L/198AL (Military)
Output Enable & Chip Enable Control Functions
– Single Chip Enable P4C198
– Dual Chip Enable P4C198A
Common Inputs and Outputs
Fully TTL Compatible Inputs and Outputs
Standard Pinout (JEDEC Approved)
– 24-Pin 300 mil DIP
– 24-Pin 300 mil SOJ (P4C198 only)
– 28-Pin 350 x 550 mil LCC (P4C198 only)
DESCRIPTION
The P4C198/L and P4C198A/L are 65,536-bit ultra high-
speed static RAMs organized as 16K x 4. Each device
features an active low Output Enable control to eliminate
data bus contention. The P4C198/L also have an active
low Chip Enable (the P4C198A/L have two Chip Enables,
both active low) for easy system expansion. The CMOS
memories require no clocks or refreshing and have equal
access and cycle times. Inputs are fully TTL-compatible.
The RAMs operate from a single 5V
±
10% tolerance
power supply. Data integrity is maintained with supply
voltages down to 2.0V. Current drain is typically 10
µA
from a 2.0V supply.
Access times as fast as 12 nanoseconds are available,
permitting greatly enhanced system operating speeds.
CMOS is used to reduce power consumption to a low 715
mW active, 193 mW standby.
The P4C198/L and P4C198A/L are available in 24-pin 300
mil DIP and SOJ, and 28-pin 350 x 550 mil LCC packages
providing excellent board level densities.
FUNCTIONAL BLOCK DIAGRAM
A
(8)
A
I/O
1
I/O
2
I/O
3
I/O
4
INPUT
DATA
CONTROL
COLUMN I/O
ROW
SELECT
65,536-BIT
MEMORY
ARRAY
PIN CONFIGURATIONS
A0
A1
A2
A3
A4
A5
A6
A7
A8
C E
(C
E
1)
OE
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V CC
A 13
A 12
A 11
A 10
A9
NC (C
E
2)
I/O4
I/O3
I/O2
I/O1
WE
3
A0
NC
VCC
NC
27
A1
A2
A3
A4
A5
A6
A7
A8
CE
NC
4
5
6
7
8
9
10
11
12
13
2
1
28
26
25
24
23
22
21
20
19
NC
A 13
A 12
A 11
A 10
A9
I/O
I/O 3
I/O 2
14 15 16
18
17
GND
CE(CE
1
)
(P4C198A ONLY)
(CE
2
)
WE
OE
A
(6)
A
DIP (P4, D4), SOJ (J4)
TOP VIEW
P4C198 (P4C198A)
LCC (L5)
TOP VIEW
P4C198 ONLY
Means Quality, Service and Speed
1Q97
71
I/O 1
OE
NC
WE
COLUMN
SELECT
P4C198/198L, P4C198A/198AL
MAXIMUM RATINGS
(1)
Symbol
V
CC
Parameter
Power Supply Pin with
Respect to GND
Terminal Voltage with
Respect to GND
(up to 7.0V)
Operating Temperature
Value
–0.5 to +7
–0.5 to
V
CC
+0.5
–55 to +125
Unit
V
Symbol
T
BIAS
T
STG
V
°C
P
T
I
OUT
Parameter
Temperature Under
Bias
Storage Temperature
Power Dissipation
DC Output Current
Value
–55 to +125
–65 to +150
1.0
50
Unit
°C
°C
W
mA
V
TERM
T
A
RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE
Grade(2)
Military
Ambient
Temperature
GND
0V
0V
0V
V
CC
5.0V
±
10%
5.0V
±
10%
5.0V
±
10%
CAPACITANCES
(4)
V
CC
= 5.0V, T
A
= 25°C, f = 1.0MHz
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Conditions Typ. Unit
V
IN
= 0V
5
7
pF
pF
–55°C to +125°C
0°C to +70°C
Commercial
–40°C to +85°C
Industrial
Output Capacitance V
OUT
= 0V
DC ELECTRICAL CHARACTERISTICS
Over recommended operating temperature and supply voltage
(2)
Symbol
V
IH
V
IL
V
HC
V
LC
V
CD
V
OL
V
OH
I
LI
I
LO
I
SB
Parameter
Input High Voltage
Input Low Voltage
CMOS Input High Voltage
CMOS Input Low Voltage
Input Clamp Diode Voltage V
CC
= Min., I
IN
= 18 mA
Output Low Voltage
(TTL Load)
Output High Voltage
(TTL Load)
Input Leakage Current
Output Leakage Current
I
OL
= +10 mA, V
CC
= Min.
I
OL
= +8 mA, V
CC
= Min.
I
OH
= –4 mA, V
CC
= Min.
V
CC
= Max.
V
IN
= GND to V
CC
V
CC
= Max.,
CE
= V
IH
,
V
OUT
= GND to V
CC
Mil.
Com’l.
Mil.
Com’l.
0.5
0.4
2.4
–10
–5
–10
–5
___
___
___
___
+10
+5
+10
+5
40
35
20
15
2.4
–5
n/a
–5
n/a
___
___
___
___
+5
n/a
+5
n/a
40
n/a
1.5
n/a
Test Conditions
P4C198 / 198A
Min
Max
2.2
–0.5
(3)
–0.5
(3)
0.8
0.2
–1.2
0.5
0.4
P4C198L / 198AL
Unit
Min
Max
V
CC
+0.5
2.2
V
CC
+0.5 V
–0.5
(3)
–0.5(3)
0.8
0.2
–1.2
V
V
V
V
V
V
V
µA
µA
mA
V
CC
–0.2 V
CC
+0.5 V
CC
–0.2 V
CC
+0.5
Standby Power Supply
CE
1
,
CE
2
≥
V
IH
Mil.
Current (TTL Input Levels) V
CC
= Max .,
Ind./Com’l.
f = Max., Outputs Open
Standby Power Supply
Current
(CMOS Input Levels)
CE
1
,
CE
2
≥
V
IH
Mil.
V
CC
= Max.,
Ind./Com’l.
f = 0, Outputs Open
V
IN
≤
V
LC
or V
IN
≥
V
HC
I
SB1
mA
n/a = Not Applicable
Notes:
1. Stresses greater than those listed under MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification
is not implied. Exposure to MAXIMUM ratingconditions for extended
periods may affect reliability.
2. Extended temperature operation guaranteed with 400 linear feet per
minute of air flow.
3. Transient inputs with V
IL
and I
IL
not more negative than –3.0V and
–100mA, respectively, are permissible for pulse widths up to 20 ns.
4. This parameter is sampled and not 100% tested.
72
P4C198/198L, P4C198A/198AL
READ CYCLE NO. 2 (ADDRESS Controlled)
(5,6)
t
RC
ADDRESS
t
AA
t
OH
DATA OUT
PREVIOUS DATA VALID
DATA VALID
1520 05
(10)
READ CYCLE NO. 3 (C
E
(12)
Controlled)
(5,7,8)
C
tRC
CE
tAC
(11)
DATA VALID
ICC
VCC SUPPLY
CURRENT
ISB
t
(11)
tHZ
(9,11)
tLZ
DATA OUT
PU
(9,11)
HIGH IMPEDANCE
tPD
(11)
Notes:
6.
CE
(CE
1
CE
2
for P4C198A/L) and
OE
are LOW READ cycle.
7.
OE
is LOW for the cycle.
8. ADDRESS must be valid prior to, or coincident with
CE
(CE
1
and
CE
2
for P4C198A/L) transition LOW.
9. Transition is measured
±
200mV from steady state voltage
prior to change, with loading as specified in Figure 1.
10. Read Cycle Time is measured from the last valid address to
the first transitioning address.
11. Transitions caused by a chip enable control have similar
delays irrespective of whether
CE
1
or
CE
2
causes them
(P4C198A/L).
12.
CE
1
,
CE
2
for P4C198A/L.
75
PCB Design
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