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HY27SS16561M-FCB

Description
Flash, 16MX16, 10000ns, PBGA63, 9 X 11 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, FBGA-63
Categorystorage    storage   
File Size733KB,44 Pages
ManufacturerSK Hynix
Websitehttp://www.hynix.com/eng/
Download Datasheet Parametric View All

HY27SS16561M-FCB Overview

Flash, 16MX16, 10000ns, PBGA63, 9 X 11 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, FBGA-63

HY27SS16561M-FCB Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeBGA
package instructionTFBGA,
Contacts63
Reach Compliance Codeunknown
ECCN code3A991.B.1.A
Maximum access time10000 ns
JESD-30 codeR-PBGA-B63
length11 mm
memory density268435456 bit
Memory IC TypeFLASH
memory width16
Number of functions1
Number of terminals63
word count16777216 words
character code16000000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize16MX16
Package body materialPLASTIC/EPOXY
encapsulated codeTFBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, THIN PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Programming voltage1.8 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)1.95 V
Minimum supply voltage (Vsup)1.7 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formBALL
Terminal pitch0.8 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
width9 mm
Base Number Matches1
HY27SS(08/16)561M Series
HY27US(08/16)561M Series
256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
Document Title
256Mbit (32Mx8bit / 16Mx16bit) NAND Flash Memory
Revision History
No.
0.0
0.1
0.2
Initial Draft
Renewal Product Group
Append 1.8V Operation Product to Data sheet
Insert Spare Enable function for GND Pin(#6)
- In case of Reading or Programming, GND Pin(#6) should be Low
or High.
- Change the test condition of Stand-by current-Refer to Table 13.
Change CSP Package name & thickness
- Name : VFBGA -> FBGA
- Thickness : 1.0mm(max) -> 1.2mm(max)
1) Delete Cache Program Mode
2) Modify the description of Device Operations
- /CE Don’t Care Enabled(Disabled) -> Sequential Row Read
Disabled(Enabled) (Page23)
1) change FBGA dimension
:
Thickness : 1.2mm(max) -> 1.0mm(max)
2) Edit Fig.33 read operation with CE don't care
1) Change TSOP1,WSOP1,FBGA package dimension
0.6
- Change TSOP1,WSOP1,FBGA mechanical data
- Inches parameter has been excluded from the mechanical data table
1) Change TSOP1, WSOP1, FBGA package dimension
2) Edit TSOP1, WSOP1 package figures
3) Change FBGA package figure
Oct. 18. 2004
Preliminary
History
Draft Date
Jul. 10. 2003
Dec. 08. 2003
Dec. 08. 2003
Remark
Preliminary
Preliminary
Preliminary
0.3
Mar. 08. 2004
Preliminary
0.4
Jun. 01. 2004
Preliminary
0.5
Sep. 24. 2004
Preliminary
0.7
Oct. 20. 2004
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
use of circuits described. No patent licenses are implied.
Rev 0.7 / Oct. 2004
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