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WS1M8-20DJMA

Description
Standard SRAM, 1MX8, 20ns, CMOS, CDSO36, CERAMIC, SOJ-36
Categorystorage    storage   
File Size373KB,6 Pages
ManufacturerMicrosemi
Websitehttps://www.microsemi.com
Download Datasheet Parametric View All

WS1M8-20DJMA Overview

Standard SRAM, 1MX8, 20ns, CMOS, CDSO36, CERAMIC, SOJ-36

WS1M8-20DJMA Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
Objectid1820326449
Parts packaging codeSOJ
package instructionSOJ,
Contacts36
Reach Compliance Codecompliant
ECCN code3A991.B.2.A
Maximum access time20 ns
Other featuresTTL COMPATIBLE INPUTS/OUTPUTS
JESD-30 codeR-CDSO-J36
JESD-609 codee0
memory density8388608 bit
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of terminals36
word count1048576 words
character code1000000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize1MX8
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeSOJ
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formJ BEND
Terminal locationDUAL
width11.3 mm
White Electronic Designs
2x512Kx8 DUALITHIC™ SRAM
FEATURES
Access Times 17, 20, 25, 35, 45, 55ns
Revolutionary, Center Power/Ground Pinout
Packaging:
• 32 pin, Hermetic Ceramic DIP (Package 300)
• 36 lead Ceramic SOJ (Package 100)
• 36 lead Ceramic Flatpack (Package 226)
Organized as two banks of 512Kx8
WS1M8-XXX
Commercial, Industrial and Military Temperature Ranges
5 Volt Power Supply
Low Power CMOS
TTL Compatible Inputs and Outputs
PIN CONFIGURATION FOR WS1M8-XDJX
AND WS1M8-XFX
36 CSOJ
36 FLATPACK
PIN CONFIGURATION FOR WS1M8-XCX
32 DIP
TOP VIEW
NC
A18
A17
A16
A15
OE#
I/O7
I/O6
GND
V
CC
I/O5
I/O4
A14
A13
A12
A11
A10
CS2#
TOP VIEW
A0
A1
A2
A3
A4
CS1#
I/O0
I/O1
V
CC
GND
I/O2
I/O3
WE#
A5
A6
A7
A8
A9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
A15
A17
WE#
A13
A8
A9
A11
CS2#
A10
CS1#
I/O7
I/O6
I/O5
I/O4
I/O3
Pin Description
A0-18
I/O0-7
CS1-2#
OE#
WE#
V
CC
GND
Address Inputs
Data Input/Output
Chip Selects
Output Enable
Write Enable
+5.0V Power
Ground
I/O0-7
WE#
OE#
A0-18
Pin Description
A0-18
I/O0-7
CS1-2#
WE#
V
CC
GND
Address Inputs
Data Input/Output
Chip Selects
Write Enable
+5.0V Power
Ground
Block Diagram
Block Diagram
I/O0-7
WE#
A0-18
512K x 8
512K x 8
512K x 8
512K x 8
NOTE:
1. CS1# and CS2# are used to select the lower and upper 512Kx8 of the device. CS1# and CS2# must not be enabled at the same time.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
July 2004
Rev. 5
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
CS1#
(1)
CS2#
(1)
CS
1#
(1)
CS
2#
(1)

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