Features
•
High-performance, Low-power AVR
®
8-bit Microcontroller
•
Advanced RISC Architecture
– 131 Powerful Instructions – Most Single-clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 20 MIPS Throughput at 20 MHz
– On-chip 2-cycle Multiplier
High Endurance Non-volatile Memory segments
– 16/32/64/128K Bytes of In-System Self-programmable Flash program memory
– 512B/1K/2K/4K Bytes EEPROM
– 1/2/4/16K Bytes Internal SRAM
– Write/Erase Cycles: 10,000 Flash/ 100,000 EEPROM
– Data retention: 20 years at 85°C/ 100 years at 25°C
(1)
– Optional Boot Code Section with Independent Lock Bits
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
– Programming Lock for Software Security
JTAG (IEEE std. 1149.1 Compliant) Interface
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
Peripheral Features
– Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode
– Real Time Counter with Separate Oscillator
– Six PWM Channels
– 8-channel, 10-bit ADC
Differential mode with selectable gain at 1x, 10x or 200x
– Byte-oriented Two-wire Serial Interface
– Two Programmable Serial USART
– Master/Slave SPI Serial Interface
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated RC Oscillator
– External and Internal Interrupt Sources
– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby and
Extended Standby
I/O and Packages
– 32 Programmable I/O Lines
– 40-pin PDIP, 44-lead TQFP, 44-pad VQFN/QFN/MLF
•
•
•
8-bit
Microcontroller
with
16/32/64/128K
Bytes In-System
Programmable
Flash
ATmega164A
ATmega164PA
ATmega324A
ATmega324PA
ATmega644A
ATmega644PA
ATmega1284
ATmega1284P
•
•
– 44-pad DRQFN
– 49-ball VFBGA
•
Operating Voltages
– 1.8 - 5.5V
•
Speed Grades
– 0 - 4 MHz @ 1.8 - 5.5V
–
0 - 10 MHz @ 2.7 - 5.5V
–
0 - 20 MHz @ 4.5 - 5.5V
•
Power Consumption at 1 MHz, 1.8V, 25°C
– Active: 0.4 mA
– Power-down Mode: 0.1µA
– Power-save Mode: 0.6µA (Including 32 kHz RTC)
Note:
1. See
”Data Retention” on page 9
for details.
8272A–AVR–01/10
164A/164PA/324A/324PA/644A/644PA/1284/1284P
2. Overview
The ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P is a low-power CMOS 8-bit
microcontroller based on the AVR enhanced RISC architecture. By executing powerful instruc-
tions in a single clock cycle, the ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P
achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize
power consumption versus processing speed.
2.1
Block Diagram
Block Diagram
PA7..0
VCC
Figure 2-1.
PB7..0
RESET
Power
Supervision
POR / BOD &
RESET
PORT A (8)
PORT B (8)
GND
Watchdog
Timer
Watchdog
Oscillator
A/D
Converter
Analog
Comparator
USART 0
XTAL1
Oscillator
Circuits /
Clock
Generation
EEPROM
Internal
Bandgap reference
SPI
XTAL2
8bit T/C 0
CPU
JTAG/OCD
16bit T/C 1
TWI
FLASH
SRAM
8bit T/C 2
USART 1
PORT C (8)
PORT D (8)
TOSC2/PC7
TOSC1/PC6
PC5..0
PD7..0
The AVR core combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs up to ten times faster than
conventional CISC microcontrollers.
The ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P provide the following features:
5
8272A–AVR–01/10
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