Added Figure 31 to Figure 33; Renumbered Sequentially ........ 10
Added Figure 34 to Figure 36........................................................ 11
1/08—Revision 0: Initial Version
Rev. B | Page 2 of 16
AD8273
SPECIFICATIONS
V
S
= ±15 V, V
REF
= 0 V, T
A
= 25°C, G = ½, R
L
= 2 kΩ, unless otherwise noted.
Table 2.
Parameter
DYNAMIC PERFORMANCE
Bandwidth
Slew Rate
Settling Time to 0.1%
Settling Time to 0.01%
Channel Separation
NOISE/DISTORTION
1
THD + Noise (THD + N)
Noise Floor, RTO
2
Output Voltage Noise (Referred to Output)
GAIN
Gain Error
Gain Drift
Gain Nonlinearity
INPUT CHARACTERISTICS
Offset
3
vs. Temperature
vs. Power Supply
Common-Mode Rejection Ratio
Input Voltage Range
4
Impedance
5
Differential
Common Mode
6
OUTPUT CHARACTERISTICS
Output Swing
Short-Circuit Current Limit
Capacitive Load Drive
POWER SUPPLY
Supply Current (per Amplifier)
TEMPERATURE RANGE
Specified Performance
1
2
Conditions
Min
Typ
20
Max
Unit
MHz
V/μs
ns
ns
dB
%
dBu
μV rms
nV/√Hz
20
10 V step on output, C
L
= 100 pF
10 V step on output, C
L
= 100 pF
f = 1 kHz
f = 1 kHz, V
OUT
= 10 V p-p, 600 Ω load
20 kHz BW
f = 20 Hz to 20 kHz
f = 1 kHz
670
750
130
0.00025
−106
3.5
26
0.05
10
750
800
−40°C to +85°C
V
OUT
= 10 V p-p, 600 Ω load
Referred to output
−40°C to +85°C
V
S
= ±2.5 V to ±18 V
V
CM
= ±40 V, R
S
= 0 Ω, referred to input
2
2
100
3
2
86
%
ppm/°C
ppm
μV
μV/°C
μV/V
dB
V
kΩ
kΩ
700
5
+3V
S
− 4.5
77
−3V
S
+ 4.5
V
CM
= 0 V
36
9
−V
S
+ 1.5
+V
S
− 1.5
100
60
200
1200
2.5
−40
+85
Sourcing
Sinking
G=½
G=2
V
mA
mA
pF
pF
mA
°C
Includes amplifier voltage and current noise, as well as noise of internal resistors.
dBu = 20 log (V rms/0.7746).
3
Includes input bias and offset current errors.
4
May also be limited by absolute maximum input voltage or by the output swing. See the Absolute Maximum Ratings section and Figure 9 through Figure 12 for
details.
5
Internal resistors are trimmed to be ratio matched but have ±20% absolute accuracy.
6
Common mode is calculated looking into both inputs. Common-mode impedance looking into only one input is 18 kΩ.
Rev. B | Page 3 of 16
AD8273
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Output Short-Circuit Current
Voltage at Any Input Pin
Differential Input Voltage
Current into Any Input Pin
Human Body Model (HBM) ESD Rating
Storage Temperature Range
Specified Temperature Range
Thermal Resistance
θ
JA
θ
JC
Package Glass Transition Temperature (T
G
)
Rating
±18 V
Observe
derating curve
40 V
40 V
3 mA
±4000 V
−65°C to +130°C
−40°C to +85°C
105°C/W
36°C/W
150°C
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation for the AD8273 is limited
by the associated rise in junction temperature (T
J
) on the die. At
approximately 150°C, which is the glass transition temperature,
the plastic changes its properties. Even temporarily exceeding
this temperature limit may change the stresses that the package
exerts on the die, permanently shifting the parametric performance
of the amplifiers. Exceeding a temperature of 150°C for an
extended period can result in a loss of functionality.
The AD8273 has built-in, short-circuit protection that limits the
output current to approximately 100 mA (see Figure 2 for more
information). While the short-circuit condition itself does not
damage the part, the heat generated by the condition can cause
the part to exceed its maximum junction temperature, with
corresponding negative effects on reliability.
2.0
T
J
MAX = 150°C
θ
JA
= 105°C/W
MAXIMUM POWER DISSIPATION (W)
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
1.6
1.2
0.8
0.4
–25
0
25
50
75
100
125
AMBIENT TEMPERATURE (°C)
Figure 2. Maximum Power Dissipation vs. Ambient Temperature
ESD CAUTION
Rev. B | Page 4 of 16
06981-043
0
–50
AD8273
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NC
1
–INA
2
+INA
3
–V
S 4
14
13
REFA
OUTA
SENSEA
AD8273
12
TOP VIEW
11
+V
S
(Not to Scale)
10
SENSEB
+INB
5
–INB
6
NC
7
9
8
OUTB
06981-020
REFB
NC = NO CONNECT
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
1, 7
2
3
4
5
6
8
9
10
11
12
13
14
Mnemonic
NC
−INA
+INA
−V
S
+INB
−INB
REFB
OUTB
SENSEB
+V
S
SENSEA
OUTA
REFA
Description
No Connect.
The 12 kΩ resistor connects to the negative terminal of Op Amp A.
The 12 kΩ resistor connects to the positive terminal of Op Amp A.
Negative Supply.
The 12 kΩ resistor connects to the positive terminal of Op Amp B.
The 12 kΩ resistor connects to the negative terminal of Op Amp B.
The 6 kΩ resistor connects to the positive terminal of Op Amp B.
Op Amp B Output.
The 6 kΩ resistor connects to the negative terminal of Op Amp B.
Positive Supply.
The 6 kΩ resistor connects to the negative terminal of Op Amp A.
Op Amp A Output.
The 6 kΩ resistor connects to the positive terminal of Op Amp A.
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