DATASHEET
Dual LDO with Low Noise, High Performance and Low I
Q
ISL78302
ISL78302 is a high performance dual LDO capable of sourcing
300mA current from each output. It has a low standby current
and is stable with an output capacitance of 1µF to 10µF and an
ESR of up to 200mΩ.
The device integrates an individual Power-On-Reset (POR)
function for each output. The POR delay for VO2 can be externally
programmed by connecting a timing capacitor to the CPOR pin.
The POR delay for VO1 is internally fixed at approximately 2ms. A
reference bypass pin is also provided for connecting a noise
filtering capacitor for low noise and high-PSRR applications.
The quiescent current is typically only 47µA with both LDOs
enabled and active. Separate enable pins control each individual
LDO output. When both enable pins are low, the device is in
shutdown, typically drawing less than 0.5µA.
The part operates down to 2.3V and up to 6.5V input. The typical
output voltage can be as low as 1.2V and as high as 3.3V for
each regulator. Please refer to the “Ordering Information” on
page 3 for standard options.
The ISL78302 is AEC-Q100 qualified at the automotive
temperature range of -40°C to +105°C.
Features
• Integrates two 300mA high performance LDOs
• Excellent transient response to large current steps
• ±1.8% Accuracy over all operating conditions
• Excellent load regulation: <0.1% voltage change across full
range of load current
• Extremely low quiescent current: 47µA (both LDOs active)
• Wide input voltage capability: 2.3V to 6.5V
• Low dropout voltage: typically 300mV at 300mA
• Low output noise: typically 37µV
RMS
at 100µA (1.5V)
• Stable with 1µF to 10µF ceramic capacitors
• Separate enable and POR pins for each LDO
• Soft-start and staged turn-on to limit input current surge during
enable
• Current limit and over-temperature protection
• Tiny 10 Lead 3mm x 3mm DFN package
• AEC-Q100 qualified
• Pb-free (RoHS Compliant)
Applications
• Radio receivers
• Camera modules
• GPS/navigation
• Infotainment systems
ISL78302
VIN (2.3 TO 6.5V)
1
ON
2
3
4
5
C1
C2
C3
VIN
EN1
EN2
CBYP
CPOR
VO1
VO2
POR2
POR1
GND
10
9
8
7
6
C4
C5
V
OUT2
OK
V
OUT2
TOO LOW
V
OUT1
OK
V
OUT1
TOO LOW
V
OUT1
V
OUT2
RESET2
(200ms DELAY,
C3 = 0.01µF)
RESET1
(2ms DELAY)
ENABLE1
OFF ON
ENABLE2
OFF
C1, C4, C5: 1µF X5R CERAMIC CAPACITOR
C2: 0.01µF X7R CERAMIC CAPACITOR
C3: 0.01µF X7R CERAMIC CAPACITOR
FIGURE 1. TYPICAL APPLICATION
November 6, 2014
FN7696.6
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL78302
Block Diagram
VIN
VO1
VO2
LDO
ERROR
AMPLIFIER
VO1
~1.0V
VREF
TRIM
POR
COMPARATOR
1V
VOK1
POR1
LDO-2
QEN1
QEN2
VOK2
POR2
VO2
IS1
LDO-1
QEN1
IS1
IS2
VO2
100k
EN1
EN2
CBYP
UVLO
CONTROL
LOGIC
POR2
VOK2
POR2
DELAY
100k
BANDGAP AND
TEMPERATURE
SENSOR
VO1
VOLTAGE
REFERENCE
GENERATOR
1.00V
0.94V
0.90V
VOK1
POR1
DELAY
POR1
CPOR
GND
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FN7696.6
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ISL78302
Pin Configuration
ISL78302
(10 LD 3x3 DFN)
TOP VIEW
VIN 1
EN1 2
EN2 3
CBYP 4
CPOR 5
10 VO1
9
8
7
6
VO2
POR2
POR1
GND
Pin Descriptions
PIN
NUMBER
1
2
3
4
5
PIN
NAME
VIN
EN1
EN2
CBYP
Analog I/O
Low Voltage Compatible CMOS Input
Low Voltage Compatible CMOS Input
Analog I/O
TYPE
LDO-1 Enable. ENABLE = HIGH
LDO-2 Enable. ENABLE = HIGH
Reference Bypass Capacitor Pin. Recommended to connect capacitor of value 0.01µF
between this pin and GND for optimum noise and PSRR performance.
POR2 Delay Setting Capacitor Pin. Connect a capacitor between this pin and GND to delay
the POR2 output release after LDO-2 output reaches 94% of its specified voltage level.
(200ms delay per 0.01µF).
GND is the connection to system ground. Connect to PCB Ground plane.
Open-drain POR Output for LDO-1 (active-low). Internally connected to VO1 through 100kΩ
resistor.
Open-drain POR Output for LDO-2 (active-low). Internally connected to VO2 through 100kΩ
resistor.
LDO-2 Output. Connect capacitor of value 1µF to 10µF to GND (1µF recommended).
LDO-1 Output. Connect capacitor of value 1µF to 10µF to GND (1µF recommended).
DESCRIPTION
Supply Voltage/LDO Input. Connect a 1µF capacitor to GND.
CPOR Analog I/O
6
7
8
9
10
GND
Ground
POR1 Open-Drain Output (1mA)
POR2 Open-Drain Output (1mA)
VO2
VO1
Analog I/O
Analog I/O
Ordering Information
PART NUMBER
(Notes
1, 2, 3)
ISL78302ARFBZ
ISL78302ARBFZ
ISL78302ARNBZ
ISL78302ARBNZ
ISL78302ARNWZ
ISL78302ARWCZ
ISL78302ARFWZ
ISL78302ARCWZ
ISL78302AR1AZ
NOTES:
1. Add “-T*”suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
ISL78302.
For more information on MSL please see techbrief
TB363.
PART
MARKING
DNAB
DNAC
DNAD
DNAE
DNAF
DNAG
DNAH
DNAJ
DNAV
VO1 VOLTAGE
(V)
2.5
1.5
3.3
1.5
3.3
1.2
2.5
1.8
1.25
VO2 VOLTAGE
(V)
1.5
2.5
1.5
3.3
1.2
1.8
1.2
1.2
3.3
TEMP RANGE
(°C)
-40 to +105
-40 to +105
-40 to +105
-40 to +105
-40 to +105
-40 to +105
-40 to +105
-40 to +105
-40 to +105
PACKAGE
(Pb-Free)
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
PKG
DWG. #
L10.3x3C
L10.3x3C
L10.3x3C
L10.3x3C
L10.3x3C
L10.3x3C
L10.3x3C
L10.3x3C
L10.3x3C
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ISL78302
Absolute Maximum Ratings
Supply Voltage (V
IN
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7.1V
V
O
1, V
O
2 Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +3.6V
All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (V
IN
+ 0.3)V
ESD Ratings
Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . . . 3kV
Machine Model (Tested per JESD-A115-A) . . . . . . . . . . . . . . . . . . . 200V
Charge Device Model (Tested Per AEC-Q100-011). . . . . . . . . . . . . . . 2kV
Thermal Information
Thermal Resistance (Notes
4, 5)
JA
(°C/W)
JC
(°C/W)
10 Ld 3x3 DFN Package . . . . . . . . . . . . . . .
59
18.5
Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
Operating Temperature Range . . . . . . . . . . . . . . . . . . . . . .-40°C to +105°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see
TB493
Recommended Operating Conditions
Ambient Temperature Range (T
A
) . . . . . . . . . . . . . . . . . . .-40°C to +105°C
Supply Voltage (V
IN
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3V to 6.5V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief
TB379.
5. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature
range of the device as follows: T
A
= -40°C to +105°C; V
IN
= (V
O
+ 0.5V) to 6.5V with a minimum V
IN
of 2.3V; C
IN
= 1µF; C
O
= 1µF; C
BYP
= 0.01µF;
C
POR
= 0.01µF. Boldface limits apply across the operating temperature range, -40°C to +105°C.
PARAMETER
DC CHARACTERISTICS
Supply Voltage
Ground Current
I
DD1
I
DD2
Shutdown Current
UVLO Threshold
I
DDS
V
UV+
V
UV-
Regulation Voltage Accuracy
V
IN
= V
O
+ 0.5V to 5.5V, I
O
= 10µA to 300mA,
T
J
= +25°C
V
IN
= V
O
+ 0.5V to 5.5V, I
O
= 10µA to 300mA,
T
J
= -40°C to +105°C
Maximum Output Current
Internal Current Limit
Dropout Voltage (Note
6)
I
MAX
I
LIM
V
DO
I
O
= 300mA
I
O
= 150mA
Thermal Shutdown Temperature
T
SD+
T
SD-
AC CHARACTERISTICS
Ripple Rejection
I
O
= 10mA, V
IN
= 2.8V(min), V
O
= 1.5V,
C
BYP
= 0.01µF
at 1kHz
at 10kHz
at 100kHz
64
51
38
dB
dB
dB
Continuous
1.9
1.6
-0.8
-1.8
300
320
475
300
150
145
110
250
650
V
IN
Quiescent condition: I
O1
= 0µA; I
O2
= 0µA
One LDO active
Both LDO active
30
47
0.3
2.1
1.8
36
55
2.1
2.3
2.0
+0.8
+1.8
µA
µA
µA
V
V
%
%
mA
mA
mV
mV
°C
°C
2.3
6.5
V
SYMBOL
TEST CONDITIONS
MIN
(Note
7)
TYP
MAX
(Note
7)
UNITS
Electrical Specifications
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ISL78302
Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature
range of the device as follows: T
A
= -40°C to +105°C; V
IN
= (V
O
+ 0.5V) to 6.5V with a minimum V
IN
of 2.3V; C
IN
= 1µF; C
O
= 1µF; C
BYP
= 0.01µF;
C
POR
= 0.01µF. Boldface limits apply across the operating temperature range, -40°C to +105°C.
(Continued)
PARAMETER
Output Noise Voltage
DEVICE START-UP CHARACTERISTICS
Device Enable Time
LDO Soft-start Ramp Rate
t
EN
t
SSR
Time from assertion of the ENx pin to when the output
voltage reaches 95% of the VO(nom)
Slope of linear portion of LDO output voltage ramp during
start-up, V
OUT
> 1.25V
Slope of linear portion of LDO output voltage ramp during
start-up, V
OUT
≤
1.25V
EN1, EN2 PIN CHARACTERISTICS
Input Low Voltage
Input High Voltage
Input Leakage Current
Pin Capacitance
POR1, POR2 PIN CHARACTERISTICS
POR1, POR2 Thresholds
V
POR+
V
POR-
POR1 Delay
t
P1LH
t
P1HL
POR2 Delay
t
P2LH
t
P2HL
POR1, POR2 Pin Output Low
Voltage
POR1, POR2 Pin Internal Pull-up
Resistance
NOTES:
6. VOx = 0.98*VOx(NOM); Valid for VOx greater than 1.85V.
7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
V
OL
R
POR
at I
OL
= 1.0mA
78
100
C
POR
= 0.01µF
100
As a percentage of nominal output voltage
91
87
0.5
94
90
2.0
25
200
25
0.2
180
300
97
93
3.2
%
%
ms
µs
ms
µs
V
kΩ
V
IL
V
IH
I
IL
, I
IH
C
PIN
Informative
5
-0.3
1.35
0.5
V
IN
+ 0.3
0.1
V
V
µA
pF
250
30
40
500
60
80
µs
µs/V
µs/V
SYMBOL
TEST CONDITIONS
I
O
= 100µA, V
O
= 1.5V, T
A
= +25°C, C
BYP
= 0.01µF
BW = 10Hz to 100kHz
MIN
(Note
7)
TYP
37
MAX
(Note
7)
UNITS
µV
RMS
Electrical Specifications
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