K8D1716UBC-DC080 datasheet, PDF

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K8D1716UBC-DC080: DescriptionFlash, 1MX16, 80ns, PBGA48, 6 X 8.50 MM, 0.80 MM PITCH, LEAD FREE, TBGA-48; Categorystorage storage; File Size561KB，41 Pages; ManufacturerSAMSUNG; Websitehttp://www.samsung.com/Products/Semiconductor/; Environmental Compliance

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K8D1716UBC-DC080 Overview

Flash, 1MX16, 80ns, PBGA48, 6 X 8.50 MM, 0.80 MM PITCH, LEAD FREE, TBGA-48

K8D1716UBC-DC080 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Parts packaging code	BGA
package instruction	VFBGA, BGA48,6X8,32
Contacts	48
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	80 ns
Spare memory width	8
startup block	BOTTOM
command user interface	YES
Universal Flash Interface	YES
Data polling	YES
JESD-30 code	R-PBGA-B48
JESD-609 code	e1
length	8.5 mm
memory density	16777216 bit
Memory IC Type	FLASH
memory width	16
Humidity sensitivity level	3
Number of functions	1
Number of departments/size	8,31
Number of terminals	48
word count	1048576 words
character code	1000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	1MX16
Package body material	PLASTIC/EPOXY
encapsulated code	VFBGA
Encapsulate equivalent code	BGA48,6X8,32
Package shape	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	260
power supply	3/3.3 V
Programming voltage	2.7 V
Certification status	Not Qualified
ready/busy	YES
Maximum seat height	1 mm
Department size	8K,64K
Maximum standby current	0.000018 A
Maximum slew rate	0.05 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN SILVER COPPER
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
switch bit	YES
type	NOR TYPE
width	6 mm
Base Number Matches	1

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K8D1716UTC / K8D1716UBC

FLASH MEMORY

Document Title

16M Bit (2M x8/1M x16) Dual Bank NOR Flash Memory

Revision History

Revision No. History

0.0

0.1

0.2

1.0

Initial Draft

Support 48TSOP1 Lead Free Package

Support 48FBGA Leaded/Lead Free Package

Specification finalized

Draft Date

July 25, 2004

Sep 16, 2004

Nov 29, 2004

Dec 16, 2004

Remark

Advance

Preliminary

Revision 1.0

December 2004

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