PD - 97126
IRFP3077PbF
Applications
l
High Efficiency Synchronous Rectification in SMPS
l
Uninterruptible Power Supply
l
High Speed Power Switching
l
Hard Switched and High Frequency Circuits
Benefits
l
Worldwide Best R
DS(on)
in TO-247
l
Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l
Fully Characterized Capacitance and Avalanche
SOA
l
Enhanced body diode dV/dt and dI/dt Capability
G
S
HEXFET
®
Power MOSFET
D
V
DSS
R
DS(on)
typ.
max.
I
D
(Silicon Limited)
I
D
(Package Limited)
D
75V
2.8m
:
3.3m
:
200A
c
120A
G
D
S
TO-247AC
G
D
S
G ate
Drain
Source
Absolute Maximum Ratings
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
D
@ T
C
= 25°C
I
DM
P
D
@T
C
= 25°C
V
GS
dV/dt
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Wire Bond Limited)
Pulsed Drain Current
d
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery
f
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
Max.
200c
140c
120
850
340
2.3
± 20
2.5
-55 to + 175
300
10lbxin (1.1Nxm)
200
See Fig. 14, 15, 22a, 22b,
Units
A
W
W/°C
V
V/ns
°C
Avalanche Characteristics
E
AS (Thermally limited)
I
AR
E
AR
Single Pulse Avalanche Energy
e
Avalanche Current
c
Repetitive Avalanche Energy
g
mJ
A
mJ
Thermal Resistance
Symbol
R
θJC
R
θCS
R
θJA
Parameter
Junction-to-Case
j
Case-to-Sink, Flat Greased Surface
Junction-to-Ambient
j
Typ.
–––
0.24
–––
Max.
0.44
–––
40
Units
°C/W
www.irf.com
1
3/3/08
IRFP3077PbF
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
V
(BR)DSS
ΔV
(BR)DSS
/ΔT
J
R
DS(on)
V
GS(th)
I
DSS
I
GSS
R
G
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Input Resistance
Min. Typ. Max. Units
75
–––
–––
2.0
–––
–––
–––
–––
–––
––– –––
0.091 –––
2.8
3.3
–––
4.0
–––
20
––– 250
––– 100
––– -100
1.2
–––
Conditions
V V
GS
= 0V, I
D
= 250μA
V/°C Reference to 25°C, I
D
= 5mA
mΩ V
GS
= 10V, I
D
= 75A
V V
DS
= V
GS
, I
D
= 250μA
μA
V
DS
= 75V, V
GS
= 0V
V
DS
= 75V, V
GS
= 0V, T
J
= 125°C
nA V
GS
= 20V
V
GS
= -20V
Ω
f = 1MHz, open drain
g
d
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
gfs
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
eff. (ER)
C
oss
eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min. Typ. Max. Units
160
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
160
37
42
25
87
69
95
9400
820
350
1090
1260
–––
220
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
nC
Conditions
V
DS
= 50V, I
D
= 75A
I
D
= 75A
V
DS
= 38V
V
GS
= 10V
V
DD
= 38V
I
D
= 75A
R
G
= 2.1Ω
V
GS
= 10V
V
GS
= 0V
V
DS
= 50V
ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 60V
V
GS
= 0V, V
DS
= 0V to 60V
ns
g
g
pF
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
h
i
j
, See Fig.11
h
, See Fig. 5
D
Diode Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
Min. Typ. Max. Units
–––
–––
––– 200
–––
Conditions
MOSFET symbol
showing the
integral reverse
G
S
A
Ãdi
850
p-n junction diode.
––– –––
1.3
V T
J
= 25°C, I
S
= 75A, V
GS
= 0V
V
R
= 64V,
–––
42
63
ns T
J
= 25°C
I
F
= 75A
T
J
= 125°C
–––
50
75
di/dt = 100A/μs
–––
59
89
nC T
J
= 25°C
T
J
= 125°C
–––
86
130
–––
2.5
–––
A T
J
= 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
g
g
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 120A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.028mH
R
G
= 25Ω, I
AS
= 120A, V
GS
=10V. Part not recommended for use
above this value .
I
SD
≤
75A, di/dt
≤
400A/μs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400μs; duty cycle
≤
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
R
θ
is measured at T
J
approximately 90°C
2
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IRFP3077PbF
1000
TOP
1000
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
TOP
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
BOTTOM
BOTTOM
4.5V
100
100
4.5V
≤
60μs PULSE WIDTH
Tj = 25°C
10
0.1
1
10
100
10
0.1
1
≤
60μs PULSE WIDTH
Tj = 175°C
10
100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
2.5
Fig 2.
Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance
ID = 75A
2.0
ID, Drain-to-Source Current
(Α)
VGS = 10V
100
(Normalized)
TJ = 175°C
1.5
10
TJ = 25°C
VDS = 25V
1.0
≤
60μs PULSE WIDTH
1
2.0
3.0
4.0
5.0
6.0
7.0
8.0
0.5
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)
Fig 3.
Typical Transfer Characteristics
16000
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Fig 4.
Normalized On-Resistance vs. Temperature
20
VGS, Gate-to-Source Voltage (V)
ID= 75A
VDS = 60V
VDS= 38V
VDS= 17V
16
12000
C, Capacitance (pF)
Ciss
8000
12
8
4000
4
Coss
Crss
0
1
10
100
0
0
40
80
120
160
200
240
280
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFP3077PbF
1000.0
10000
TJ = 175°C
ISD , Reverse Drain Current (A)
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS (on)
1000
100μsec
100
10msec
100.0
10.0
TJ = 25°C
1.0
10
LIMITED BY PACKAGE
1msec
1
VGS = 0V
0.1
0.0
0.4
0.8
1.2
1.6
2.0
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
1.0
DC
0.1
10.0
100.0
VSD , Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
V(BR)DSS , Drain-to-Source Breakdown Voltage
Fig 8.
Maximum Safe Operating Area
100
240
LIMITED BY PACKAGE
200
ID , Drain Current (A)
160
120
80
40
0
25
50
75
100
125
150
175
TC , Case Temperature (°C)
90
80
70
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 9.
Maximum Drain Current vs.
Case Temperature
3.0
Fig 10.
Drain-to-Source Breakdown Voltage
1000
EAS, Single Pulse Avalanche Energy (mJ)
2.5
800
22A
40A
BOTTOM
120A
TOP
ID
2.0
Energy (μJ)
600
1.5
400
1.0
0.5
200
0.0
0
20
40
60
80
0
25
50
75
100
125
150
175
VDS, Drain-to-Source Voltage (V)
Starting TJ, Junction Temperature (°C)
Fig 11.
Typical C
OSS
Stored Energy
Fig 12.
Maximum Avalanche Energy Vs. DrainCurrent
4
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IRFP3077PbF
1
D = 0.50
Thermal Response ( Z thJC )
0.1
0.20
0.10
0.05
0.02
0.01
R
1
R
1
τ
J
τ
1
τ
2
R
2
R
2
R
3
R
3
τ
C
τ
1
τ
2
τ
3
τ
3
τ
0.01
τ
J
Ri (°C/W)
τι
(sec)
0.001
SINGLE PULSE
( THERMAL RESPONSE )
Ci=
τi/Ri
Ci=
τi/Ri
0.083889 0.000083
0.190848 0.000995
0.165682 0.007038
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
0.0001
1E-006
1E-005
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
100
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔTj
= 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
10
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔΤ
j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14.
Typical Avalanche Current vs.Pulsewidth
240
EAR , Avalanche Energy (mJ)
200
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 120A
160
120
80
40
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
ΔT
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
175
0
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/
Z
thJC
I
av
= 2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Fig 15.
Maximum Avalanche Energy vs. Temperature
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