CAT24WC33P-REVB datasheet, PDF

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CAT24WC33P-REVB: DescriptionEEPROM, 4KX8, Serial, CMOS, PDIP8, PLASTIC, DIP-8; Categorystorage storage; File Size399KB，10 Pages; ManufacturerCatalyst; Websitehttp://www.catalyst-semiconductor.com/

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CAT24WC33P-REVB Overview

EEPROM, 4KX8, Serial, CMOS, PDIP8, PLASTIC, DIP-8

CAT24WC33P-REVB Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	DIP
package instruction	DIP,
Contacts	8
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum clock frequency (fCLK)	0.1 MHz
JESD-30 code	R-PDIP-T8
JESD-609 code	e0
length	9.36 mm
memory density	32768 bit
Memory IC Type	EEPROM
memory width	8
Number of functions	1
Number of terminals	8
word count	4096 words
character code	4000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	4KX8
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	SERIAL
Peak Reflow Temperature (Celsius)	240
Certification status	Not Qualified
Maximum seat height	4.57 mm
Serial bus type	I2C
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2.5 V
Nominal supply voltage (Vsup)	3 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	7.62 mm
Maximum write cycle time (tWC)	10 ms
Base Number Matches	1

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CAT24WC33/65

32K/64K-Bit I

C Serial CMOS EEPROM

FEATURES

400 KHz I

C Bus Compatible*

1.8 to 6 Volt Read and Write Operation

Cascadable for up to Eight Devices

32-Byte Page Write Buffer

Self-Timed Write Cycle with Auto-Clear

8-Pin DIP or 8-Pin SOIC

Schmitt Trigger Inputs for Noise Protection

Zero Standby Current

LOGEN

Commercial, Industrial and Automotive Tem-

perature Ranges

Write Protection

–Bottom 1/4 Array Protected When WP at V

1,000,000 Program/Erase Cycles

100 Year Data Retention

DESCRIPTION

The CAT24WC33/65 is a 32K/64K-bit Serial CMOS

PROM internally organized as 4096/8192 words of 8

bits each. Catalyst’s advanced CMOS technology sub-

stantially reduces device power requirements. The

CAT24WC33/65 features a 32-byte page write buffer.

The device operates via the I

C bus serial interface and

is available in 8-pin DIP or 8-pin SOIC packages.

PIN CONFIGURATION

DIP Package (P, L)

VSS

VCC

SCL

SDA

BLOCK DIAGRAM

EXTERNAL LOAD

DOUT

ACK

VCC

VSS

WORD ADDRESS

BUFFERS

COLUMN

DECODERS

256

SENSE AMPS

SHIFT REGISTERS

SOIC Package (J, W, K, X)

VSS

VCC

SCL

SDA

START/STOP

LOGIC

PROM

XDEC 128/256 128/256 X 256

CONTROL

LOGIC

PIN FUNCTIONS

Pin Name

A0, A1, A2

SDA

SCL

Function

Device Address Inputs

Serial Data/Address

Serial Clock

Write Protect

+1.8V to +6V Power Supply

Ground

SCL

STATE COUNTERS

SLAVE

ADDRESS

COMPARATORS

HIGH VOLTAGE/

TIMING CONTROL

DATA IN STORAGE

* Catalyst Semiconductor is licensed by Philips Corporation to carry the I

C Bus Protocol.

Characteristics subject to change without notice

Doc. No. 1049, Rev. B

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