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74AUP2G132GF,115

Description
74AUP2G132 - Low-power dual 2-input NAND Schmitt trigger SON 8-Pin
Categorylogic    logic   
File Size267KB,25 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Environmental Compliance
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74AUP2G132GF,115 Overview

74AUP2G132 - Low-power dual 2-input NAND Schmitt trigger SON 8-Pin

74AUP2G132GF,115 Parametric

Parameter NameAttribute value
Brand NameNexperia
Is it Rohs certified?conform to
Parts packaging codeSON
package instructionVSON,
Contacts8
Manufacturer packaging codeSOT1089
Reach Compliance Codecompliant
seriesAUP/ULP/V
JESD-30 codeR-PDSO-N8
JESD-609 codee3
length1.35 mm
Logic integrated circuit typeNAND GATE
Humidity sensitivity level1
Number of functions2
Number of entries2
Number of terminals8
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeVSON
Package shapeRECTANGULAR
Package formSMALL OUTLINE, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
propagation delay (tpd)27.9 ns
Maximum seat height0.5 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)0.8 V
Nominal supply voltage (Vsup)1.1 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTin (Sn)
Terminal formNO LEAD
Terminal pitch0.35 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width1 mm
Base Number Matches1
74AUP2G132
Rev. 8 — 3 July 2017
Low-power dual 2-input NAND Schmitt trigger
Product data sheet
1
General description
The 74AUP2G132 provides the dual 2-input NAND Schmitt trigger function which
accepts standard input signals. They can transform slowly changing input signals into
sharply defined, jitter-free output signals.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing a damaging backflow current through the device
when it is powered down.
The inputs switch at different points for positive and negative-going signals. The
difference between the positive voltage V
T+
and the negative voltage V
T-
is defined as the
input hysteresis voltage V
H
.
2
Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5 000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1 000 V
Low static power consumption; I
CC
= 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
3
Applications
Wave and pulse shaper
Astable multivibrator
Monostable multivibrator

74AUP2G132GF,115 Related Products

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Description 74AUP2G132 - Low-power dual 2-input NAND Schmitt trigger SON 8-Pin IC GATE NAND SCHMITT 2CH 8XSON IC GATE NAND SCHMITT 2CH 8X2SON IC GATE NAND SCHMITT 2CH 8VSSOP IC GATE NAND SCHMITT 2CH 8XSON IC GATE NAND SCHMITT 2CH 8XSON IC GATE NAND SCHMITT 2CH 8XQFN 74AUP2G132 - Low-power dual 2-input NAND Schmitt trigger SON 8-Pin NAND Gate
package instruction VSON, SON, HVBCC, VSSOP, VSON, SON-8 QFN-8 3 X 2 MM, 0.50 MM HEIGHT, PLASTIC, SOT996-2, SON-8 X2SON-8
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant compliant compli
Brand Name Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia -
Parts packaging code SON SON - SSOP SON SON QFN SON -
Contacts 8 8 - 8 8 8 8 8 -
Manufacturer packaging code SOT1089 SOT1116 SOT1233 SOT765-1 SOT833-1 SOT1203 SOT902-2 SOT996-2 -
series AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V - AUP/ULP/V
JESD-30 code R-PDSO-N8 R-PDSO-N8 R-PBCC-B8 R-PDSO-G8 R-PDSO-N8 R-PDSO-N8 S-PQCC-N8 - R-PBCC-B8
JESD-609 code e3 e3 - e4 e3 e3 e4 - -
length 1.35 mm 1.2 mm 1.35 mm 2.3 mm 1.95 mm 1.35 mm 1.6 mm - 1.35 mm
Logic integrated circuit type NAND GATE NAND GATE NAND GATE NAND GATE NAND GATE NAND GATE NAND GATE - NAND GATE
Humidity sensitivity level 1 1 - 1 1 1 1 - 1
Number of functions 2 2 2 2 2 2 2 - 2
Number of entries 2 2 2 2 2 2 2 - 2
Number of terminals 8 8 8 8 8 8 8 - 8
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C - 125 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C - -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY - PLASTIC/EPOXY
encapsulated code VSON SON HVBCC VSSOP VSON VSON VQCCN - HVBCC
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR SQUARE - RECTANGULAR
Package form SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE CHIP CARRIER, VERY THIN PROFILE - CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED 260 260 NOT SPECIFIED 260 - 260
propagation delay (tpd) 27.9 ns 27.9 ns 27.9 ns 27.9 ns 27.9 ns 27.9 ns 27.9 ns - 27.9 ns
Maximum seat height 0.5 mm 0.35 mm 0.35 mm 1 mm 0.5 mm 0.35 mm 0.5 mm - 0.35 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V - 3.6 V
Minimum supply voltage (Vsup) 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V - 0.8 V
Nominal supply voltage (Vsup) 1.1 V 1.1 V 1.1 V 1.1 V 1.1 V 1.1 V 1.1 V - 1.1 V
surface mount YES YES YES YES YES YES YES - YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS - CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE - AUTOMOTIVE
Terminal surface Tin (Sn) Tin (Sn) - Nickel/Palladium/Gold (Ni/Pd/Au) Tin (Sn) Tin (Sn) Nickel/Palladium/Gold (Ni/Pd/Au) - -
Terminal form NO LEAD NO LEAD BUTT GULL WING NO LEAD NO LEAD NO LEAD - BUTT
Terminal pitch 0.35 mm 0.3 mm - 0.5 mm 0.5 mm 0.35 mm 0.5 mm - -
Terminal location DUAL DUAL BOTTOM DUAL DUAL DUAL QUAD - BOTTOM
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED 30 30 NOT SPECIFIED 30 - 30
width 1 mm 1 mm 0.8 mm 2 mm 1 mm 1 mm 1.6 mm - 0.8 mm
Base Number Matches 1 - 1 1 1 - - 1 -

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